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README

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SN74LVC1G38DC

lingxingic · Logic Gates · SOT-353

SN74LVC1G38DC from lingxingic, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 2-input NAND gate; recommended input voltage range is 0 V to 5.5 V.
2 B input Data input B of the 2-input NAND gate; recommended input voltage range is 0 V to 5.5 V.
3 GND power_in Ground (0 V) reference for the device.
4 Y output Open-drain data output with 5 V tolerant outputs for interfacing with 5 V logic; recommended output voltage range is 0 V to 5.5 V.
5 VCC power_in Supply voltage; recommended operating range is 1.65 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOT-353
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 6.5 V 5
input voltage VI -0.5 6.5 V 5
output voltage VO -0.5 6.5 V Active mode 5
input clamping current IIK -50 mA VI < 0V 5
output clamping current IOK -50 50 mA VO > VCC or VO < 0V 5
output current IO -50 50 mA VO=0V to VCC 5
supply current ICC 100 mA 5
ground current IGND -100 mA 5
storage temperature Tstg -65 150 ℃ 5
total power dissipation Ptot 300 mW 5
soldering temperature TL 260 ℃ 10s 5
supply voltage VCC 1.65 5.5 V 5
input voltage VI 0 5.5 V 5
output voltage VO 0 5.5 V Active mode 5
ambient temperature Tamb -40 125 ℃ 5
HIGH-level input voltage VIH 1.7 V Tamb=-40℃ to +85℃; VCC=2.3V to 2.7V 6
HIGH-level input voltage VIH 2 V Tamb=-40℃ to +85℃; VCC=2.7V to 3.6V 6
LOW-level input voltage VIL 0.7 V Tamb=-40℃ to +85℃; VCC=2.3V to 2.7V 6
LOW-level input voltage VIL 0.8 V Tamb=-40℃ to +85℃; VCC=2.7V to 3.6V 6
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=100uA; VCC=1.65V to 5.5V 6
LOW-level output voltage VOL 0.45 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=4mA; VCC=1.65V 6
LOW-level output voltage VOL 0.3 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=8mA; VCC=2.3V 6
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=12mA; VCC=2.7V 6
LOW-level output voltage VOL 0.55 V Tamb=-40℃ to +85℃; VI = VIH or VIL; IO=24mA; VCC=3.0V 6
input leakage current II -1 1 uA Tamb=-40℃ to +85℃; VI=5.5V or GND; VCC=0V to 5.5V 6
OFF-state output current IOZ -2 2 uA Tamb=-40℃ to +85℃; VI=VIH or VIL; VO=VCC or GND; VCC=5.5V 6
power-off leakage current IOFF -2 2 uA Tamb=-40℃ to +85℃; VI or VO=5.5V; VCC=0V 6
supply current ICC 4 uA Tamb=-40℃ to +85℃; VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V 6
additional supply current ΔICC 500 uA Tamb=-40℃ to +85℃; per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V 6
HIGH-level input voltage VIH 1.7 V Tamb=-40℃ to +125℃; VCC=2.3V to 2.7V 7
HIGH-level input voltage VIH 2 V Tamb=-40℃ to +125℃; VCC=2.7V to 3.6V 7
LOW-level input voltage VIL 0.7 V Tamb=-40℃ to +125℃; VCC=2.3V to 2.7V 7
LOW-level input voltage VIL 0.8 V Tamb=-40℃ to +125℃; VCC=2.7V to 3.6V 7
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=100uA; VCC=1.65V to 5.5V 7
LOW-level output voltage VOL 0.7 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=4mA; VCC=1.65V 7
LOW-level output voltage VOL 0.45 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=8mA; VCC=2.3V 7
LOW-level output voltage VOL 0.6 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=12mA; VCC=2.7V 7
LOW-level output voltage VOL 0.8 V Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=24mA; VCC=3.0V 7
input leakage current II -1 1 uA Tamb=-40℃ to +125℃; VI=5.5V or GND; VCC=0V to 5.5V 7
OFF-state output current IOZ -2 2 uA Tamb=-40℃ to +125℃; VI=VIH or VIL; VO=VCC or GND; VCC=5.5V 7
power-off leakage current IOFF -2 2 uA Tamb=-40℃ to +125℃; VI or VO=5.5V; VCC=0V 7
supply current ICC 4 uA Tamb=-40℃ to +125℃; VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V 7
additional supply current ΔICC 500 uA Tamb=-40℃ to +125℃; per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V 7
A, B to Y propagation delay tPHL, tPLH 10.5 15.8 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=1.65V to 1.95V 8
A, B to Y propagation delay tPHL, tPLH 6.3 9.5 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=2.3V to 2.7V 8
A, B to Y propagation delay tPHL, tPLH 8.8 13.1 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=2.7V 8
A, B to Y propagation delay tPHL, tPLH 8.1 12.1 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=3.0V to 3.6V 8
A, B to Y propagation delay tPHL, tPLH 5.3 7.9 ns Tamb=-40℃ to +85℃; see Figure 5; VCC=4.5V to 5.5V 8
A, B to Y propagation delay tPHL, tPLH 19.7 ns Tamb=-40℃ to +125℃; see Figure 5; VCC=1.65V to 1.95V 8
A, B to Y propagation delay tPHL, tPLH 11.8 ns Tamb=-40℃ to +125℃; see Figure 5; VCC=2.3V to 2.7V 8
A, B to Y propagation delay tPHL, tPLH 17.1 ns Tamb=-40℃ to +125℃; see Figure 5; VCC=2.7V 8
A, B to Y propagation delay tPHL, tPLH 15.3 ns Tamb=-40℃ to +125℃; see Figure 5; VCC=3.0V to 3.6V 8
A, B to Y propagation delay tPHL, tPLH 9.9 ns Tamb=-40℃ to +125℃; see Figure 5; VCC=4.5V to 5.5V 8

CAD (KiCad official)

  • Symbol: SN74LVC1G38DC
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g38dc-etched.step / sn74lvc1g38dc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g38dc.step / sn74lvc1g38dc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (12 pp, sha256 36d90089c874a236, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF