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USB2244I-AEZG-06-TR
Public Made by Adomby adom
Microchip Tech Interface - Specialized, QFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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Datasheet
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README
markdownUSB2244I-AEZG-06-TR
Microchip Tech · Interface - Specialized · QFN-36(6x6)
USB2244I-AEZG-06-TR from Microchip Tech, in a QFN-36(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LED | bidirectional | Media activity LED output (I/O12 buffer, 12 mA sink and source). |
| 2 | USB+ | bidirectional | USB bus data plus signal, analog I/O as defined in the USB 2.0 Specification. |
| 3 | USB- | bidirectional | USB bus data minus signal, analog I/O as defined in the USB 2.0 Specification. |
| 4 | SD_D1 | bidirectional | SD/MMC bi-directional data bit 1 with weak internal pull-up, 12 mA sink and source. |
| 5 | SD_D0 | bidirectional | SD/MMC bi-directional data bit 0 with weak internal pull-up, 12 mA sink and source. |
| 6 | VDD33 | power_in | 3.3 V power and regulator input. |
| 7 | SD_D7 | bidirectional | SD/MMC bi-directional data bit 7 with weak internal pull-up, 12 mA sink and source. |
| 8 | SD_D6 | bidirectional | SD/MMC bi-directional data bit 6 with weak internal pull-up, 12 mA sink and source. |
| 9 | SD_CLK | output | Output clock to the SD/MMC device with software-configurable frequency, 12 mA source. |
| 10 | SD_D5 | bidirectional | SD/MMC bi-directional data bit 5 with weak internal pull-up, 12 mA sink and source. |
| 11 | SD_CMD | bidirectional | Bi-directional command signal to the CMD pin of the SD/MMC device with weak internal pull-up, 12 mA sink and source. |
| 12 | NC | unconnected | No connect; no trace or signal should be routed or attached to this pin. |
| 13 | VDD18 | power_in | +1.8 V core power; must have a 1.0 µF ± 20% (ESR < 0.1 Ω) capacitor to VSS. |
| 14 | VDD33 | power_in | 3.3 V power and regulator input. |
| 15 | NC | unconnected | No connect; no trace or signal should be routed or attached to this pin. |
| 16 | NC | unconnected | No connect; no trace or signal should be routed or attached to this pin. |
| 17 | NC | unconnected | No connect; no trace or signal should be routed or attached to this pin. |
| 18 | RESET_N | input | Active-low Schmitt-trigger chip reset input; the low pulse should be at least 1 µs wide. |
| 19 | NC | unconnected | Not connected on USB2244/44I (listed without a signal name in the reset-state table). |
| 20 | SD_D4 | bidirectional | SD/MMC bi-directional data bit 4 with weak internal pull-up, 12 mA sink and source. |
| 21 | CRD_PWR | bidirectional | Card power drive of 3.3 V at either 100 mA or 200 mA from the internal FET (I/O200 buffer). |
| 22 | VDD33 | power_in | 3.3 V power and regulator input. |
| 23 | SD_D3 | bidirectional | SD/MMC bi-directional data bit 3 with weak internal pull-up, 12 mA sink and source. |
| 24 | NC | unconnected | Not connected on USB2244/44I (listed without a signal name in the reset-state table). |
| 25 | SD_D2 | bidirectional | SD/MMC bi-directional data bit 2 with weak internal pull-up, 12 mA sink and source. |
| 26 | SD_nCD | input | SD card detect input, enabled as an input with pull-up after reset. |
| 27 | RXD / SDA | bidirectional | UART RXD input (custom firmware required) or SDA data pin to an external serial EEPROM (I/O12). |
| 28 | TEST | input | Test input; tie to ground for normal operation. |
| 29 | NC | unconnected | Not connected on USB2244/44I (listed without a signal name in the reset-state table). |
| 30 | SD_WP | input | SD write protect detection signal. |
| 31 | TXD / SCK | output | UART TXD output (custom firmware required) or clock output to an external EEPROM (O12). |
| 32 | XTAL2 | output | 24 MHz crystal output terminal, left open when an external clock drives XTAL1 (CLKIN). |
| 33 | XTAL1 (CLKIN) | input | 24 MHz crystal terminal or external 24 MHz clock input when a crystal is not used. |
| 34 | VDD18PLL | power_in | +1.8 V filtered analog power for the internal PLL; must have a 1.0 µF ± 20% (ESR < 0.1 Ω) capacitor to VSS. |
| 35 | RBIAS | passive | USB transceiver bias pin; a 12.0 kΩ ± 1.0% resistor is connected from VSS to this pin. |
| 36 | VDDA33 | power_in | 3.3 V analog power. |
| 37 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-36(6x6) |
| Category | Interface ICs |
| Pins | 37 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | TA | -40 | 85 | °C | Industrial Part; ambient temperature in still air | 32 | |
| 3.3 V supply voltage | VDD33 | 3 | 3.6 | V | Note 9-3 | 32 | |
| 3.3 V supply rise time | tRT | 0 | 400 | μs | 32 | ||
| Voltage on USB+ and USB- pins | -0.3 | 5.5 | V | 32 | |||
| Storage Temperature | TA | -55 | 150 | °C | 31 | ||
| 3.3 V supply voltage | VDD33 | -0.5 | 4 | V | 31 | ||
| Voltage on USB+ and USB- pins | -0.5 | 6 | V | Printed as (3.3 V supply voltage + 2) ≤ 6V | 31 | ||
| Voltage on XTAL1 | -0.5 | 3.6 | V | 31 | |||
| Low Input Level, I and IPU/IPD buffers | VILI | 0.8 | V | TTL Levels | 32 | ||
| High Input Level, I and IPU/IPD buffers | VIHI | 2 | V | TTL Levels | 32 | ||
| Low Input Level, IS buffer | VILI | 0.8 | V | TTL Levels | 32 | ||
| High Input Level, IS buffer | VIHI | 2 | V | TTL Levels | 32 | ||
| Low Input Level, ICLK buffer | VILCK | 0.5 | V | 32 | |||
| High Input Level, ICLK buffer | VIHCK | 1.4 | V | 32 | |||
| Input Leakage, ICLK buffer | IIL | -10 | 10 | μA | VIN = 0 to VDD33 | 32 | |
| Input Leakage, all I and IS buffers, low | IIL | -10 | 10 | μA | VIN = 0 | 32 | |
| Input Leakage, all I and IS buffers, high | IIH | -10 | 10 | μA | VIN = VDD33 | 32 | |
| Low Output Level, O12 buffer | VOL | 0.4 | V | IOL = 12 mA @ VDD33= 3.3 V | 33 | ||
| Output Leakage, O12 buffer | IOL | -10 | 10 | μA | VIN = 0 to VDD33 (Note 9-4) | 33 | |
| Low Output Level, I/O12 buffers | VOL | 0.4 | V | IOL = 12 mA @ VDD33= 3.3 V | 33 | ||
| Output Leakage, I/O12 buffers | IOL | -10 | 10 | μA | VIN = 0 to VDD33 (Note 9-4) | 33 | |
| Integrated Power FET for CRD_PWR, High Output Current Mode | IOUT | 200 | mA | VdropFET = 0.46 V | 33 | ||
| Integrated Power FET for CRD_PWR, Low Output Current Mode | IOUT | 100 | mA | VdropFET = 0.23 V | 33 | ||
| On Resistance, integrated power FET | RDSON | 2.1 | Ω | IFET = 70 mA | 33 | ||
| Output Voltage Rise Time, integrated power FET | tDSON | 800 | μs | CLOAD = 10 μF | 33 | ||
| Supply Current Unconfigured | ICCINIT | 80 | 90 | mA | 33 | ||
| Supply Current Active, Full Speed | ICC | 110 | 135 | mA | Full Speed | 33 | |
| Supply Current Active, High Speed | ICC | 140 | 165 | mA | High Speed | 33 | |
| Supply Current Suspend | ICSBY | 350 | 700 | µA | 33 | ||
| Industrial Temperature Suspend | ICSBYI | 350 | 900 | µA | 33 | ||
| Thermal Resistance, junction-to-ambient, 0 m/s | ΘJA | 33.2 | °C/W | Velocity 0 m/s | 34 | ||
| Thermal Resistance, junction-to-ambient, 1 m/s | ΘJA | 29 | °C/W | Velocity 1 m/s | 34 | ||
| Thermal Resistance, junction-to-ambient, 2 m/s | ΘJA | 26 | °C/W | Velocity 2 m/s | 34 | ||
| Junction-to-Top-of-Package, 0 m/s | ΨJT | 2.6 | °C/W | Velocity 0 m/s | 34 | ||
| Junction-to-Top-of-Package, 1 m/s | ΨJT | 2.6 | °C/W | Velocity 1 m/s | 34 | ||
| Junction-to-Top-of-Package, 2 m/s | ΨJT | 2.6 | °C/W | Velocity 2 m/s | 34 | ||
| RESET_N asserted | t1 | 1 | μsec | 27 | |||
| Device recovery/stabilization | t2 | 500 | μsec | 27 | |||
| 8051 programs device configuration | t3 | 20 | 50 | msec | 27 | ||
| USB attach | t4 | 100 | msec | 27 | |||
| Host acknowledges attach and signals USB reset | t5 | 100 | msec | 27 | |||
| Ready to handle requests | t7 | 5 | msec | 27 | |||
| Clock Input Capacitance | CXTAL | 2 | pF | All pins (except USB pins and pins under test) are tied to AC ground | 34 | ||
| Input Capacitance | CIN | 10 | pF | 34 | |||
| Output Capacitance | COUT | 20 | pF | 34 |
CAD (KiCad official)
- Symbol:
USB2244I-AEZG-06-TR - Footprint:
Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm - 3D model: QFN-36(6x6) (KiCad packages3D, STEP)
- 3D model files:
usb2244i-aezg-06-tr-etched.step/usb2244i-aezg-06-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);usb2244i-aezg-06-tr.step/usb2244i-aezg-06-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (43 pp, sha256
3e98a6a324cc56bd, retrieved 2026-11-09, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).