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ATMEGA4809-AFR
Public Made by Adomby adom
Microchip Tech ATMEL & AVR, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATMEGA4809-AFR
Microchip Tech · ATMEL & AVR · TQFP-48(7x7)
ATMEGA4809-AFR from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA5 | bidirectional | General-purpose I/O pin PA5 with alternate functions USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5 (alternate position), and it can be used as an event input and external interrupt source. |
| 2 | PA6 | bidirectional | General-purpose I/O pin PA6 with alternate functions USART0 XCK (alternate position), SPI0 SCK and CCL LUT0-OUT (alternate position); PA6 supports full asynchronous pin-change detection. |
| 3 | PA7 | bidirectional | General-purpose I/O pin PA7 with alternate functions CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVSYS EVOUTA (alternate position). |
| 4 | PB0 | bidirectional | General-purpose I/O pin PB0 with alternate functions USART3 TxD and TCA0 WO0 (alternate position). |
| 5 | PB1 | bidirectional | General-purpose I/O pin PB1 with alternate functions USART3 RxD and TCA0 WO1 (alternate position). |
| 6 | PB2 | bidirectional | General-purpose I/O pin PB2 with alternate functions USART3 XCK, TCA0 WO2 (alternate position) and EVSYS EVOUTB. |
| 7 | PB3 | bidirectional | General-purpose I/O pin PB3 with alternate functions USART3 XDIR and TCA0 WO3 (alternate position). |
| 8 | PB4 | bidirectional | General-purpose I/O pin PB4 with alternate functions USART3 TxD (alternate position), TCA0 WO4 (alternate position) and TCB2 WO (alternate position). |
| 9 | PB5 | bidirectional | General-purpose I/O pin PB5 with alternate functions USART3 RxD (alternate position), TCA0 WO5 (alternate position) and TCB3 WO. |
| 10 | PC0 | bidirectional | General-purpose I/O pin PC0 with alternate functions USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO and CCL LUT1-IN0. |
| 11 | PC1 | bidirectional | General-purpose I/O pin PC1 with alternate functions USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL LUT1-IN1. |
| 12 | PC2 | bidirectional | General-purpose I/O pin PC2 with alternate functions USART1 XCK, SPI0 SCK (alternate position), TWI0 SDA host (alternate position), TCA0 WO2 (alternate position), EVSYS EVOUTC and CCL LUT1-IN2. |
| 13 | PC3 | bidirectional | General-purpose I/O pin PC3 with alternate functions USART1 XDIR, SPI0 SS (alternate position), TWI0 SCL host (alternate position), TCA0 WO3 (alternate position) and CCL LUT1-OUT. |
| 14 | VDD | power_in | Digital supply pin; the device operating supply range is 1.8V to 5.5V per the ordering information. |
| 15 | GND | power_in | Ground reference pin for the digital supply domain. |
| 16 | PC4 | bidirectional | General-purpose I/O pin PC4 with alternate functions USART1 TxD (alternate position) and TCA0 WO4 (alternate position). |
| 17 | PC5 | bidirectional | General-purpose I/O pin PC5 with alternate functions USART1 RxD (alternate position) and TCA0 WO5 (alternate position). |
| 18 | PC6 | bidirectional | General-purpose I/O pin PC6 with alternate functions USART1 XCK (alternate position) and CCL LUT1-OUT (alternate position). |
| 19 | PC7 | bidirectional | General-purpose I/O pin PC7 with alternate functions USART1 XDIR (alternate position) and EVSYS EVOUTC (alternate position). |
| 20 | PD0 | bidirectional | General-purpose I/O pin PD0 with alternate functions ADC0 AIN0, TCA0 WO0 (alternate position) and CCL LUT2-IN0. |
| 21 | PD1 | bidirectional | General-purpose I/O pin PD1 with alternate functions ADC0 AIN1, AC0 P3 input, TCA0 WO1 (alternate position) and CCL LUT2-IN1. |
| 22 | PD2 | bidirectional | General-purpose I/O pin PD2 with alternate functions ADC0 AIN2, AC0 P0 input, TCA0 WO2 (alternate position), EVSYS EVOUTD and CCL LUT2-IN2. |
| 23 | PD3 | bidirectional | General-purpose I/O pin PD3 with alternate functions ADC0 AIN3, AC0 N0 input, TCA0 WO3 (alternate position) and CCL LUT2-OUT. |
| 24 | PD4 | bidirectional | General-purpose I/O pin PD4 with alternate functions ADC0 AIN4, AC0 P1 input and TCA0 WO4 (alternate position). |
| 25 | PD5 | bidirectional | General-purpose I/O pin PD5 with alternate functions ADC0 AIN5, AC0 N1 input and TCA0 WO5 (alternate position). |
| 26 | PD6 | bidirectional | General-purpose I/O pin PD6 with alternate functions ADC0 AIN6, AC0 P2 input and CCL LUT2-OUT (alternate position). |
| 27 | PD7 | bidirectional | General-purpose I/O pin PD7 with alternate functions VREFA (external voltage reference input), ADC0 AIN7, AC0 N2 input and EVSYS EVOUTD (alternate position). |
| 28 | AVDD | power_in | Analog supply pin powering the ADC and other analog peripherals. |
| 29 | GND | power_in | Ground reference pin for the device. |
| 30 | PE0 | bidirectional | General-purpose I/O pin PE0 with alternate functions ADC0 AIN8, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position). |
| 31 | PE1 | bidirectional | General-purpose I/O pin PE1 with alternate functions ADC0 AIN9, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position). |
| 32 | PE2 | bidirectional | General-purpose I/O pin PE2 with alternate functions ADC0 AIN10, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTE. |
| 33 | PE3 | bidirectional | General-purpose I/O pin PE3 with alternate functions ADC0 AIN11, SPI0 SS (alternate position) and TCA0 WO3 (alternate position). |
| 34 | PF0 (TOSC1) | bidirectional | General-purpose I/O pin PF0 that is also the TOSC1 crystal oscillator connection, with alternate functions USART2 TxD, TCA0 WO0 (alternate position) and CCL LUT3-IN0. |
| 35 | PF1 (TOSC2) | bidirectional | General-purpose I/O pin PF1 that is also the TOSC2 crystal oscillator connection, with alternate functions USART2 RxD, TCA0 WO1 (alternate position) and CCL LUT3-IN1. |
| 36 | PF2 | bidirectional | General-purpose I/O pin PF2 with alternate functions TWI0 SDA client (alternate position), ADC0 AIN12, USART2 XCK, TCA0 WO2 (alternate position), EVSYS EVOUTF and CCL LUT3-IN2. |
| 37 | PF3 | bidirectional | General-purpose I/O pin PF3 with alternate functions ADC0 AIN13, USART2 XDIR, TWI0 SCL client (alternate position), TCA0 WO3 (alternate position) and CCL LUT3-OUT. |
| 38 | PF4 | bidirectional | General-purpose I/O pin PF4 with alternate functions ADC0 AIN14, USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position). |
| 39 | PF5 | bidirectional | General-purpose I/O pin PF5 with alternate functions ADC0 AIN15, USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position). |
| 40 | PF6 (RESET) | bidirectional | General-purpose I/O pin PF6 that serves as the external RESET pin when the RSTPINCFG fuse selects RESET, with alternate functions USART2 XCK (alternate position) and CCL LUT3-OUT (alternate position). |
| 41 | UPDI | bidirectional | Unified Program and Debug Interface pin used for programming and debugging the device. |
| 42 | VDD | power_in | Digital supply pin; the device operating supply range is 1.8V to 5.5V per the ordering information. |
| 43 | GND | power_in | Ground reference pin for the device. |
| 44 | PA0 (EXTCLK) | bidirectional | General-purpose I/O pin PA0 that is also the EXTCLK external clock input, with alternate functions USART0 TxD, TCA0 WO0 and CCL LUT0-IN0. |
| 45 | PA1 | bidirectional | General-purpose I/O pin PA1 with alternate functions USART0 RxD, TCA0 WO1 and CCL LUT0-IN1. |
| 46 | PA2 | bidirectional | General-purpose I/O pin PA2 with alternate functions USART0 XCK, TWI0 SDA host, TCA0 WO2, TCB0 WO, EVSYS EVOUTA and CCL LUT0-IN2; PA2 supports full asynchronous pin-change detection. |
| 47 | PA3 | bidirectional | General-purpose I/O pin PA3 with alternate functions USART0 XDIR, TWI0 SCL host, TCA0 WO3, TCB1 WO and CCL LUT0-OUT. |
| 48 | PA4 | bidirectional | General-purpose I/O pin PA4 with alternate functions USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | 1.8 | 5.5 | V | ATmega4809-AFR (48-pin TQFP, Tape & Reel, 20 MHz, -40°C to +125°C), as printed in ordering table | 521 | ||
| Operating temperature range | -40 | 125 | °C | ATmega4809-AFR, as printed in ordering table | 521 | ||
| Max CPU speed | 20 | MHz | ATmega4809-AFR at 1.8-5.5V, -40°C to +125°C, as printed in ordering table | 521 |
CAD (KiCad official)
- Symbol:
ATMEGA4809-AFR - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
atmega4809-afr-etched.step/atmega4809-afr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega4809-afr.step/atmega4809-afr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (560 pp, sha256
a1755e46625fa50b, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).