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Contents

README

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STM8L151C4T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8L151C4T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA0 bidirectional Port A0 (input pull-up during and after reset) with alternate functions [USART1_CK], SWIM input/output, BEEP output and IR_TIM output, high sink LED driver capability.
2 NRST/PA1 bidirectional Reset input with pull-up at power-up, usable only as general-purpose output (open-drain or push-pull) PA1, high sink/source.
3 PA2 bidirectional Port A2 with HSE oscillator input, [USART1_TX] and [SPI1_MISO] alternate functions, high sink/source.
4 PA3 bidirectional Port A3 with HSE oscillator output, [USART1_RX] and [SPI1_MOSI] alternate functions, high sink/source.
5 PA4 bidirectional Port A4 (3.6 V tolerant) with TIM2_BKIN, ADC1_IN2 and COMP1_INP alternate functions, high sink/source.
6 PA5 bidirectional Port A5 (3.6 V tolerant) with TIM3_BKIN, ADC1_IN1 and COMP1_INP alternate functions, high sink/source.
7 PA6 bidirectional Port A6 (3.6 V tolerant) with [ADC1_TRIG], ADC1_IN0 and COMP1_INP alternate functions, high sink/source.
8 PA7 bidirectional Port A7 (5 V tolerant, no protection diode to VDD), high sink/source.
9 VSS1/VSSA/VREF- power_in I/O ground, analog ground voltage and ADC1 negative voltage reference.
10 VDD1 power_in Digital power supply.
11 VDDA power_in Analog supply voltage.
12 VREF+ power_in ADC1 and DAC positive voltage reference.
13 Reserved passive Reserved pin on STM8L151xx devices; must be tied to VDD.
14 PE0 bidirectional Port E0 (5 V tolerant, no protection diode to VDD), high sink/source.
15 PE1 bidirectional Port E1 (3.6 V tolerant) with TIM1_CH2N alternate function, high sink/source.
16 PE2 bidirectional Port E2 (3.6 V tolerant) with TIM1_CH3N alternate function, high sink/source.
17 PE3 bidirectional Port E3 (3.6 V tolerant), high sink/source.
18 PE4 bidirectional Port E4 (3.6 V tolerant), high sink/source.
19 PE5 bidirectional Port E5 (3.6 V tolerant) with ADC1_IN23, COMP2_INP and COMP1_INP alternate functions, high sink/source.
20 PD0 bidirectional Port D0 (3.6 V tolerant) with TIM3_CH2, [ADC1_TRIG], ADC1_IN22, COMP2_INP and COMP1_INP alternate functions, high sink/source.
21 PD1 bidirectional Port D1 (3.6 V tolerant) with TIM3_ETR, ADC1_IN21, COMP2_INP and COMP1_INP alternate functions, high sink/source.
22 PD2 bidirectional Port D2 (3.6 V tolerant) with TIM1_CH1, ADC1_IN20 and COMP1_INP alternate functions, high sink/source.
23 PD3 bidirectional Port D3 (3.6 V tolerant) with TIM1_ETR, ADC1_IN19 and COMP1_INP alternate functions, high sink/source.
24 PB0 bidirectional Port B0 (3.6 V tolerant) with TIM2_CH1, ADC1_IN18 and COMP1_INP; pulled up during reset, input floating after reset release.
25 PB1 bidirectional Port B1 (3.6 V tolerant) with TIM3_CH1, ADC1_IN17 and COMP1_INP alternate functions, high sink/source.
26 PB2 bidirectional Port B2 (3.6 V tolerant) with TIM2_CH2, ADC1_IN16 and COMP1_INP alternate functions, high sink/source.
27 PB3 bidirectional Port B3 (3.6 V tolerant) with TIM2_ETR, ADC1_IN15 and COMP1_INP alternate functions, high sink/source.
28 PB4 bidirectional Port B4 (3.6 V tolerant) with [SPI1_NSS], ADC1_IN14 and COMP1_INP; pulled up during reset, input floating after reset release.
29 PB5 bidirectional Port B5 (3.6 V tolerant) with [SPI1_SCK], ADC1_IN13 and COMP1_INP alternate functions, high sink/source.
30 PB6 bidirectional Port B6 (3.6 V tolerant) with [SPI1_MOSI], ADC1_IN12 and COMP1_INP alternate functions, high sink/source.
31 PB7 bidirectional Port B7 (3.6 V tolerant) with [SPI1_MISO], ADC1_IN11 and COMP1_INP alternate functions, high sink/source.
32 PF0 bidirectional Port F0 (3.6 V tolerant) with ADC1_IN24 and DAC_OUT alternate functions, high sink/source.
33 PD4 bidirectional Port D4 (3.6 V tolerant) with TIM1_CH2, ADC1_IN10 and COMP1_INP alternate functions, high sink/source.
34 PD5 bidirectional Port D5 (3.6 V tolerant) with TIM1_CH3, ADC1_IN9 and COMP1_INP alternate functions, high sink/source.
35 PD6 bidirectional Port D6 (3.6 V tolerant) with TIM1_BKIN, ADC1_IN8, RTC_CALIB, VREFINT output and COMP1_INP alternate functions, high sink/source.
36 PD7 bidirectional Port D7 (3.6 V tolerant) with TIM1_CH1N, ADC1_IN7, RTC_ALARM, VREFINT output and COMP1_INP alternate functions, high sink/source.
37 PC0 bidirectional Port C0 (5 V tolerant) true open-drain pin with I2C1_SDA data alternate function.
38 PC1 bidirectional Port C1 (5 V tolerant) true open-drain pin with I2C1_SCL clock alternate function.
39 VDD2 power_in IOs supply voltage.
40 VSS2 power_in IOs ground voltage.
41 PC2 bidirectional Port C2 (3.6 V tolerant) with USART1_RX, ADC1_IN6, COMP1_INP and VREFINT output alternate functions, high sink/source.
42 PC3 bidirectional Port C3 (3.6 V tolerant) with USART1_TX, ADC1_IN5, COMP1_INP and COMP2_INM alternate functions, high sink/source.
43 PC4 bidirectional Port C4 (3.6 V tolerant) with USART1_CK, I2C1_SMB, CCO, ADC1_IN4, COMP2_INM and COMP1_INP alternate functions, high sink/source.
44 PC5 bidirectional Port C5 with LSE oscillator input, [SPI1_NSS] and [USART1_TX] alternate functions, high sink/source.
45 PC6 bidirectional Port C6 with LSE oscillator output, [SPI1_SCK] and [USART1_RX] alternate functions, high sink/source.
46 PC7 bidirectional Port C7 (3.6 V tolerant) with ADC1_IN3, COMP2_INM and COMP1_INP alternate functions, high sink/source.
47 PE6 bidirectional Port E6 (3.6 V tolerant) with PVD_IN alternate function, high sink/source.
48 PE7 bidirectional Port E7 (3.6 V tolerant), high sink/source.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM8L151C4T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm8l151c4t6-etched.step / stm8l151c4t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8l151c4t6.step / stm8l151c4t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (141 pp, sha256 76f669f0972e887a, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF