component
HC32L136K8TA-LQFP64
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHC32L136K8TA-LQFP64
XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
HC32L136K8TA-LQFP64 from XHSC, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCAP | power_out | Internal LDO core-supply output that is for internal circuits only and requires an external decoupling capacitor of at least 1 µF. |
| 2 | PC13 | bidirectional | General-purpose I/O PC13 with alternate functions RTC_1HZ and TIM3_CH1B listed in the pin table. |
| 3 | XTLI/PC14 | input | Low-speed (32.768 kHz) crystal oscillator input shared with GPIO PC14; load capacitors must follow the crystal maker's requirements. |
| 4 | XTLO/PC15 | output | Low-speed (32.768 kHz) crystal oscillator output shared with GPIO PC15. |
| 5 | XTHI/PD00 | input | High-speed (4-32 MHz) crystal oscillator input shared with GPIO PD00, which also carries I2C0_SDA and UART1_TXD. |
| 6 | XTHO/PD01 | output | High-speed (4-32 MHz) crystal oscillator output shared with GPIO PD01, which also carries I2C0_SCL, TIM4_CHB and UART1_RXD. |
| 7 | RESETB | input | Reset input with CMOS Schmitt-trigger characteristics (hysteresis 200 mV) and a non-removable weak pull-up of 80 kΩ. |
| 8 | SEG27/PC00 | bidirectional | GPIO PC00 that also serves as LCD segment output SEG27 and ADC input AIN10. |
| 9 | SEG26/PC01 | bidirectional | GPIO PC01 that also serves as LCD segment output SEG26 and ADC input AIN11. |
| 10 | SEG25/PC02 | bidirectional | GPIO PC02 that also serves as LCD segment output SEG25 and ADC input AIN12. |
| 11 | SEG24/PC03 | bidirectional | GPIO PC03 that also serves as LCD segment output SEG24 and ADC input AIN13. |
| 12 | AVSS | power_in | Analog ground; the datasheet requires all DVSS/AVSS pins to be connected to the external supply system. |
| 13 | AVCC | power_in | Analog supply that must be the same voltage as DVCC (1.8-5.5 V), with at most 300 mV difference between them during power-up and operation. |
| 14 | SEG23/PA00 | bidirectional | GPIO PA00 that also serves as LCD segment output SEG23 and ADC input AIN0. |
| 15 | SEG22/PA01 | bidirectional | GPIO PA01 that also serves as LCD segment output SEG22 and ADC input AIN1. |
| 16 | SEG21/PA02 | bidirectional | GPIO PA02 that also serves as LCD segment output SEG21 and ADC input AIN2. |
| 17 | SEG20/PA03 | bidirectional | GPIO PA03 that also serves as LCD segment output SEG20 and ADC input AIN3. |
| 18 | PD04 | bidirectional | General-purpose I/O PD04 with no alternate function listed in the pin table. |
| 19 | PD05 | bidirectional | General-purpose I/O PD05 with no alternate function listed in the pin table. |
| 20 | SEG19/PA04 | bidirectional | GPIO PA04 that also serves as LCD segment output SEG19 and ADC input AIN4. |
| 21 | SEG18/PA05 | bidirectional | GPIO PA05 that also serves as LCD segment output SEG18. |
| 22 | SEG17/PA06 | bidirectional | GPIO PA06 that also serves as LCD segment output SEG17. |
| 23 | SEG16/PA07 | bidirectional | GPIO PA07 that also serves as LCD segment output SEG16. |
| 24 | SEG15/PC04 | bidirectional | GPIO PC04 that also serves as LCD segment output SEG15. |
| 25 | SEG14/PC05 | bidirectional | GPIO PC05 that also serves as LCD segment output SEG14. |
| 26 | SEG13/PB00 | bidirectional | GPIO PB00 that also serves as LCD segment output SEG13. |
| 27 | SEG12/PB01 | bidirectional | GPIO PB01 that also serves as LCD segment output SEG12. |
| 28 | SEG11/PB02 | bidirectional | GPIO PB02 that also serves as LCD segment output SEG11. |
| 29 | SEG10/PB10 | bidirectional | GPIO PB10 that also serves as LCD segment output SEG10. |
| 30 | SEG9/PB11 | bidirectional | GPIO PB11 that also serves as LCD segment output SEG9. |
| 31 | DVSS | power_in | Digital ground; the datasheet requires all DVSS/AVSS pins to be connected to the external supply system. |
| 32 | DVCC | power_in | Digital supply, 1.8-5.5 V, which must match AVCC; a decoupling capacitor should be placed close to this pin. |
| 33 | PB12/SEG8 | bidirectional | GPIO PB12 that also serves as LCD segment output SEG8. |
| 34 | PB13/SEG7 | bidirectional | GPIO PB13 that also serves as LCD segment output SEG7. |
| 35 | PB14/SEG6 | bidirectional | GPIO PB14 that also serves as LCD segment output SEG6. |
| 36 | PB15/SEG5 | bidirectional | GPIO PB15 that also serves as LCD segment output SEG5. |
| 37 | PC06/SEG4 | bidirectional | GPIO PC06 that also serves as LCD segment output SEG4. |
| 38 | PC07/SEG3 | bidirectional | GPIO PC07 that also serves as LCD segment output SEG3. |
| 39 | PC08/SEG2 | bidirectional | GPIO PC08 that also serves as LCD segment output SEG2. |
| 40 | PC09/SEG1 | bidirectional | GPIO PC09 that also serves as LCD segment output SEG1. |
| 41 | PA08/SEG0 | bidirectional | GPIO PA08 that also serves as LCD segment output SEG0. |
| 42 | PA09/COM0 | bidirectional | GPIO PA09 that also serves as LCD common output COM0; PA09 is one of the recommended ISP programming pins. |
| 43 | PA10/COM1 | bidirectional | GPIO PA10 that also serves as LCD common output COM1; PA09/PA10 are the recommended ISP programming interface pins. |
| 44 | PA11/COM2 | bidirectional | GPIO PA11 that also serves as LCD common output COM2. |
| 45 | PA12/COM3 | bidirectional | GPIO PA12 that also serves as LCD common output COM3. |
| 46 | PA13/SWDIO | bidirectional | GPIO PA13 that serves as the SWD data I/O (SWDIO) and as an ISP programming pin. |
| 47 | PD06 | bidirectional | General-purpose I/O PD06 that also carries I2C1_SCL, LPUART1_CTS and UART0_CTS. |
| 48 | PD07 | bidirectional | General-purpose I/O PD07 that also carries I2C1_SDA, LPUART1_RTS and UART0_RTS. |
| 49 | PA14/SWCLK | bidirectional | GPIO PA14 that serves as the SWD clock (SWCLK) and as an ISP programming pin. |
| 50 | PA15 | bidirectional | General-purpose I/O PA15 that also carries SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A. |
| 51 | PC10/COM4/SEG39 | bidirectional | GPIO PC10 that also serves as LCD common output COM4 and segment output SEG39. |
| 52 | PC11/COM5/SEG38 | bidirectional | GPIO PC11 that also serves as LCD common output COM5 and segment output SEG38. |
| 53 | PC12/COM6/SEG37 | bidirectional | GPIO PC12 that also serves as LCD common output COM6 and segment output SEG37. |
| 54 | PD02/COM7/SEG36 | bidirectional | GPIO PD02 that also serves as LCD common output COM7 and segment output SEG36. |
| 55 | PB03/SEG35/VLCDH | bidirectional | GPIO PB03 that also serves as LCD segment output SEG35 and LCD highest-voltage pin VLCDH, used in external-resistor or external-capacitor LCD modes. |
| 56 | PB04/SEG34/VLCD3 | bidirectional | GPIO PB04 that also serves as LCD segment output SEG34 and LCD bias voltage pin VLCD3, used in external-resistor or external-capacitor LCD modes. |
| 57 | PB05/SEG33/VLCD2 | bidirectional | GPIO PB05 that also serves as LCD segment output SEG33 and LCD bias voltage pin VLCD2, used in external-resistor or external-capacitor LCD modes. |
| 58 | PB06/SEG32/VLCD1 | bidirectional | GPIO PB06 that also serves as LCD segment output SEG32 and LCD bias voltage pin VLCD1, used in external-resistor or external-capacitor LCD modes. |
| 59 | PB07/SEG31 | bidirectional | GPIO PB07 that also serves as LCD segment output SEG31 and LVD input LVD_IN2. |
| 60 | BOOT0 | bidirectional | Pin PD03 used as BOOT0: high at reset selects ISP programming mode, low selects user mode (SWD programming); it also serves as LCD segment output SEG30. |
| 61 | PB08/SEG29 | bidirectional | GPIO PB08 that also serves as LCD segment output SEG29 and LVD input LVD_IN1. |
| 62 | PB09/SEG28 | bidirectional | GPIO PB09 that also serves as LCD segment output SEG28 and IR_OUT. |
| 63 | DVSS | power_in | Digital ground; the datasheet requires all DVSS/AVSS pins to be connected to the external supply system. |
| 64 | DVCC | power_in | Digital supply, 1.8-5.5 V, which must match AVCC; a decoupling capacitor should be placed close to this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XHSC |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VCC-VSS, incl. AVCC and DVCC) | VCC - VSS | -0.3 | 5.5 | V | 44 | ||
| Voltage difference between supply pins | /ΔVCCx/ | 50 | mV | 44 | |||
| Voltage difference between ground pins | /VSSx - VSS/ | 50 | mV | 44 | |||
| Total supply current through DVCC/AVCC lines | IVCC | 300 | mA | 44 | |||
| Total current through VSS ground lines | IVSS | 300 | mA | 44 | |||
| Output sink current on any I/O and control pin | IIO | 25 | mA | 44 | |||
| Output source current on any I/O and control pin | IIO | -25 | mA | 44 | |||
| Injection current on RESETB pin | IINJ(PIN) | -5 | 5 | mA | RESETB pin | 44 | |
| Injection current on XTHI and XTLI pins | IINJ(PIN) | -5 | 5 | mA | XTHI / XTLI pins | 44 | |
| Injection current on other pins | IINJ(PIN) | -5 | 5 | mA | other pins | 44 | |
| Total injection current on all I/O and control pins | ∑IINJ(PIN) | -25 | 25 | mA | all I/O and control pins | 44 | |
| Storage temperature range | TSTG | -60 | 150 | ℃ | 44 | ||
| Maximum junction temperature | TJ | 105 | ℃ | 44 | |||
| Operating supply voltage (VCC) | VCC | 1.8 | 5.5 | V | 1 | ||
| Operating ambient temperature | -40 | 85 | ℃ | 1 | |||
| External input voltage range | Vex | 0 | V | 47 | |||
| LVD detection threshold Vlevel | Vlevel | 1.7 | 1.8 | 1.9 | V | LVD_CR.VTDS=0000 | 47 |
| LVD detection threshold Vlevel | Vlevel | 1.8 | 1.9 | 2 | V | LVD_CR.VTDS=0001 | 47 |
| LVD detection threshold Vlevel | Vlevel | 1.9 | 2 | 2.1 | V | LVD_CR.VTDS=0010 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2 | 2.1 | 2.2 | V | LVD_CR.VTDS=0011 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.1 | 2.2 | 2.3 | V | LVD_CR.VTDS=0100 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.2 | 2.3 | 2.4 | V | LVD_CR.VTDS=0101 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.3 | 2.4 | 2.5 | V | LVD_CR.VTDS=0110 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.4 | 2.5 | 2.6 | V | LVD_CR.VTDS=0111 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.5 | 2.6 | 2.7 | V | LVD_CR.VTDS=1000 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.6 | 2.7 | 2.8 | V | LVD_CR.VTDS=1001 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.7 | 2.8 | 2.9 | V | LVD_CR.VTDS=1010 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.8 | 2.9 | 3 | V | LVD_CR.VTDS=1011 | 47 |
| LVD detection threshold Vlevel | Vlevel | 2.9 | 3 | 3.1 | V | LVD_CR.VTDS=1100 | 47 |
| LVD detection threshold Vlevel | Vlevel | 3 | 3.1 | 3.2 | V | LVD_CR.VTDS=1101 | 47 |
| LVD detection threshold Vlevel | Vlevel | 3.1 | 3.2 | 3.3 | V | LVD_CR.VTDS=1110 | 47 |
| LVD detection threshold Vlevel | Vlevel | 3.2 | 3.3 | 3.4 | V | LVD_CR.VTDS=1111 | 47 |
| Internal 2.5V reference voltage | VREF25 | 2.475 | 2.5 | 2.525 | V | 常温25°C 3.3V | 48 |
| Internal 2.5V reference voltage | VREF25 | 2.463 | 2.5 | 2.525 | V | -40 |
48 |
| Internal 1.5V reference voltage | VREF15 | 1.485 | 1.5 | 1.515 | V | 常温25°C 3.3V | 48 |
| Internal 1.5V reference voltage | VREF15 | 1.477 | 1.5 | 1.519 | V | -40 |
48 |
| Supply current, run in Flash, all peripherals ON, RCH clock | IDD | 1000 | 1300 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 4M | 48 | |
| Supply current, run in Flash, all peripherals ON, RCH clock | IDD | 1910 | 2420 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 8M | 48 | |
| Supply current, run in Flash, all peripherals ON, RCH clock | IDD | 3650 | 4590 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 16M | 48 | |
| Supply current, run in Flash, all peripherals ON, RCH clock | IDD | 5080 | 6330 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 22.12M | 48 | |
| Supply current, run in Flash, all peripherals ON, RCH clock | IDD | 5440 | 6820 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 24M | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH4M | IDD | 3960 | 4850 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 16M | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH4M | IDD | 5700 | 7000 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 24M | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH4M | IDD | 6600 | 7480 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 32M, FlashWait=1 | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH4M | IDD | 8140 | 9190 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 40M, FlashWait=1 | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH4M | IDD | 9550 | 10860 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 48M, FlashWait=1 | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH8M | IDD | 4030 | 4940 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH8M to xxM, 16M | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH8M | IDD | 5780 | 7060 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH8M to xxM, 24M | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH8M | IDD | 6670 | 7560 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH8M to xxM, 32M, FlashWait=1 | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH8M | IDD | 8240 | 9340 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH8M to xxM, 40M, FlashWait=1 | 48 | |
| Supply current, run in Flash, all peripherals ON, PLL from RCH8M | IDD | 9630 | 10970 | μA | All peripherals ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH8M to xxM, 48M, FlashWait=1 | 48 | |
| Supply current, run in Flash, all peripherals OFF, RCH clock | IDD | 610 | 875 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 4M | 48 | |
| Supply current, run in Flash, all peripherals OFF, RCH clock | IDD | 1330 | 1570 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 8M | 48 | |
| Supply current, run in Flash, all peripherals OFF, RCH clock | IDD | 2110 | 2900 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 16M | 48 | |
| Supply current, run in Flash, all peripherals OFF, RCH clock | IDD | 2860 | 3860 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 22.12M | 48 | |
| Supply current, run in Flash, all peripherals OFF, RCH clock | IDD | 3060 | 4120 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, RCH 24M | 48 | |
| Supply current, run in Flash, all peripherals OFF, PLL from RCH4M | IDD | 2360 | 3110 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 16M | 49 | |
| Supply current, run in Flash, all peripherals OFF, PLL from RCH4M | IDD | 3360 | 4330 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 24M | 49 | |
| Supply current, run in Flash, all peripherals OFF, PLL from RCH4M | IDD | 3490 | 4010 | μA | All peripherals OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=N40C~85C, PLL RCH4M to xxM, 32M, FlashWait=1 | 49 |
CAD (KiCad official)
- Symbol:
HC32L136K8TA-LQFP64 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
hc32l136k8ta-lqfp64-etched.step/hc32l136k8ta-lqfp64-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hc32l136k8ta-lqfp64.step/hc32l136k8ta-lqfp64.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XHSC datasheet (90 pp, sha256
863554b2ffdb4447, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).