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TPS24740RGER
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS24740RGER
Texas Instruments · Supervisor And Reset ICs · VQFN-24-EP(4x4)
TPS24740RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CP | bidirectional | Connect a storage capacitor from CP to A for fast turn-on of the blocking gate; recommended external capacitance is 1 nF to 1000 nF. |
| 2 | ENHS | input | Active-high enable input of the hot-swap function, a logic input that connects to a resistor divider and is rated 0 V to 18 V. |
| 3 | ENOR | input | Active-high enable input of the ORing function, a logic input that connects to a resistor divider and is rated 0 V to 18 V. |
| 4 | FLTb | output | Active-low open-drain output indicating various faults, with recommended sink current of 0 to 2 mA and input voltage of 0 V to 18 V. |
| 5 | PGHS | output | Active-high open-drain power-good indicator, with recommended sink current of 0 to 2 mA. |
| 6 | STAT | output | Output that is high when BGATE is ON, with recommended sink current of 0 to 2 mA. |
| 7 | TINR | bidirectional | Inrush timer that runs during start-up when the part is in current limit or power limit, with a recommended external capacitance of 1 nF. |
| 8 | TFLT | bidirectional | Fault timer that runs when the device goes from regular operation to an over-current condition, with a recommended external capacitance of 1 nF. |
| 9 | OV | input | Overvoltage comparator input that connects to a resistor divider; HGATE and BGATE are pulled low when OV exceeds the threshold, and it should be connected to ground when not used. |
| 10 | GND | power_in | Ground reference pin for the device. |
| 11 | PLIM | input | Power-limiting programming pin where a resistor from this pin to GND sets the maximum power dissipation of the hot-swap FET, with a recommended resistance of 4.99 kΩ to 500 kΩ. |
| 12 | IMON | bidirectional | Analog current monitor and load current limit program point that is connected to RIMON, which is tied to ground, with a recommended resistance of 1 kΩ to 6 kΩ and a maximum capacitance of 30 pF. |
| 13 | IMONBUF | output | Voltage output proportional to the load current over 0 V to 3.0 V, with a maximum source current of 5 mA and a maximum capacitance of 100 pF. |
| 14 | VDD | power_in | Power supply pin with a recommended operating range of 2.5 V to 18 V and an absolute maximum of 30 V. |
| 15 | SET | input | Current-limit programming set pin for hot-swap, connected from the positive terminal of the sensing resistor, with a recommended resistance of 10 Ω to 400 Ω; voltage must not be applied to this pin. |
| 16 | FSTP | input | Fast-trip programming set pin for hot-swap, connected from the positive terminal of the sensing resistor, with a recommended resistance of 10 Ω to 4000 Ω and a recommended operating range of 2.5 V to 18 V. |
| 17 | SENM | input | Current-sensing input connected directly to the negative terminal of the sensing resistor, with a recommended operating range of 2.5 V to 18 V. |
| 18 | HGATE | output | Gate driver output for the external hot-swap MOSFET, with a maximum HGATE-to-OUTH voltage of 15 V and external capacitance of up to 1 µF in series with at least 1 kΩ. |
| 19 | OUTH | input | Output voltage sense input for monitoring hot-swap MOSFET power, connected to the source terminal of the hot-swap N-channel MOSFET, with a recommended input voltage of 0 V to 18 V. |
| 20 | C | input | Voltage sense input connected to the OR MOSFET body-diode cathode (drain in the typical configuration), with a recommended range of 0.7 V to 18 V; it also supplies the ORing block under certain biasing conditions. |
| 21 | RVSNP | input | Positive input of the reverse-voltage comparator, where a resistor from RVSNP to C sets the blocking-FET reverse-voltage trip point, with a recommended resistance of 10 Ω to 1000 Ω. |
| 22 | BGATE | output | Gate output that controls the external OR MOSFET to emulate a low forward-voltage diode, with a maximum voltage of 12 V to pin A and up to 1 µF of external capacitance in series with at least 1 kΩ. |
| 23 | A | input | Voltage sense input connected to the OR MOSFET body-diode anode (source in the typical configuration), with a recommended range of 0.7 V to 18 V; it also supplies the ORing block under certain biasing conditions. |
| 24 | RVSNM | input | Negative input of the reverse-voltage comparator, with a recommended range of 0.7 V to 18 V. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
TPS24740RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
tps24740rger-etched.step/tps24740rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps24740rger.step/tps24740rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (62 pp, sha256
ec6cf2628a5bace6, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).