Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

FDP8440

UMW · MOSFETs · TO-220

FDP8440 from UMW, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input GATE terminal; gate-to-source voltage is rated ±20 V (VGSS), and the gate is the input for switching the 40 V N-channel MOSFET.
2 D passive DRAIN terminal; drain-to-source voltage is rated 40 V (VDSS) and continuous drain current is rated 277 A at TC=25°C (silicon limited).
3 S passive SOURCE terminal, the MOSFET source reference for gate drive and the drain-source rating.

Key specifications

Parameter Value
Manufacturer UMW
Package TO-220
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain to Source Voltage VDSS 40 V 1
Gate to Source Voltage VGSS -20 20 V 1
Drain Current - Continuous ID 277 A TC=25°C, Silicon Limited 1
Drain Current - Continuous ID 196 A TC=100°C, Silicon Limited 1
Drain Current - Continuous ID 100 A TC=25°C, Package Limited 1
Drain Current - Pulsed IDM 500 A TC=25°C 1
Single Pulse Avalanche Energy EAS 1682 mJ Starting TJ=25°C, L=1mH, IAS=58A, VDD=36V, VGS=10V 1
Power Dissipation PD 306 W 1
Power Dissipation Derate above 25°C 2.04 W/°C Derate above 25°C 1
Operating and Storage Temperature Range TJ, TSTG -55 175 °C 1
Maximum Lead Temperature for Soldering TL 300 °C 1/8" from case for 5 seconds 1
Thermal Resistance, Junction to Case RθJC 0.49 °C/W 2
Thermal Resistance, Junction to Ambient RθJA 62.5 °C/W 2
Thermal Resistance, Case to Sink RθJS 0.5 °C/W Case to Sink 2
Drain to Source Breakdown Voltage BVDSS 40 V ID=250µA, VGS=0V 3
Gate to Body Leakage Current IGSS -100 100 nA VGS=±20V 3
Zero Gate Voltage Drain Current IDSS 1 µA VDS=32V 3
Zero Gate Voltage Drain Current IDSS 250 µA VGS=0V, TC=150°C 3
Gate to Source Threshold Voltage VGS(th) 3 V VDS=VGS, ID=250µA 3
Static Drain-Source On-Resistance RDS(ON) 2.4 mΩ VGS=4.5V, ID=80A 3
Static Drain-Source On-Resistance RDS(ON) 2.2 mΩ 3
Input capacitance Ciss 18600 24740 pF VDS=25V, VGS=0V, f=1MHz 3
Output capacitance Coss 1840 2450 pF VDS=25V, VGS=0V, f=1MHz 3
Reverse Transfer Capacitance Crss 1400 2100 pF VDS=25V, VGS=0V, f=1MHz 3
Gate Resistance Rg 1.1 Ω VGS=0.5V, f=1MHz 3
Source to Drain Diode Voltage VSD 1.25 V ISD=80A 3
Source to Drain Diode Voltage VSD 1 V ISD=40A 3

CAD (KiCad official)

  • Symbol: FDP8440
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: fdp8440-etched.step / fdp8440-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fdp8440.step / fdp8440.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (9 pp, sha256 0dcb172dc67ea402, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF