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Contents

README

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GS8548-SR

Gainsil · Precision OpAmps · SOP-8

GS8548-SR from Gainsil, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Channel A amplifier output, rail-to-rail.
2 INA- input Channel A inverting input; input range extends 100mV beyond supply rails (VSS-0.1V to VDD+0.1V).
3 INA+ input Channel A non-inverting input; input range extends 100mV beyond supply rails (VSS-0.1V to VDD+0.1V).
4 VSS power_in Negative supply or ground; for dual-supply operation bypass to ground with a 0.1µF ceramic capacitor.
5 INB+ input Channel B non-inverting input; input range extends 100mV beyond supply rails (VSS-0.1V to VDD+0.1V).
6 INB- input Channel B inverting input; input range extends 100mV beyond supply rails (VSS-0.1V to VDD+0.1V).
7 OUTB output Channel B amplifier output, rail-to-rail.
8 VDD power_in Positive supply, 2.2V to 5.5V single supply (absolute max 7.5V VDD to VSS); bypass with a 0.1µF ceramic capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Gainsil
Package SOP-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -5 1 5 μV VCM = VS/2 5
Common-Mode Voltage Range VCM -0.1 5.6 V VS = 5.5V 5
Common-Mode Rejection Ratio CMRR 100 120 dB VS = 5V, VCM = -0.1V to 5.1V 5
Open-Loop Voltage Gain AOL 100 130 dB Vs=5V, RL = 10kΩ, VCM = -0.1V to 5.1V 5
Input Offset Voltage Drift ΔVOS/ΔT 0.027 0.13 μV/℃ 5
Output Voltage Swing from Rail (high) VOH 4.99 4.998 V Vs=5V, RL = 100kΩ 5
Output Voltage Swing from Rail (low) VOL 1 10 mV Vs=5V, RL = 100kΩ 5
Output Voltage Swing from Rail (high) VOH 4.95 4.98 V Vs=5V, RL = 10kΩ 5
Output Voltage Swing from Rail (low) VOL 10 30 mV Vs=5V, RL = 10kΩ 5
Operating Voltage Range 2.2 5.5 V 5
Power Supply Rejection Ratio PSRR 100 120 dB VS = +2.5V to +5.5V, VCM = +0.5V 5
Shutdown Current / Amplifier IQ_SD 1 5 μA 5
Power Supply Voltage (VDD to Vss) VDD to Vss -0.5 7.5 V 3
Analog Input Voltage (IN+ or IN-) -0.5 0.5 V Printed as Vss-0.5V (min) and VDD+0.5V (max); values are the offsets from the supply rails 3
PDB Input Voltage PDB -0.5 7 V Printed as Vss-0.5V (min) 3
Operating Temperature Range -40 125 °C 3
Junction Temperature 160 °C 3
Storage Temperature Range -55 150 °C 3
Lead Temperature 260 °C soldering, 10 sec 3
ESD Susceptibility HBM 4.5 KV HBM 3
ESD Susceptibility MM 350 V MM 3
Input Bias Current IB 100 pA 5
Input Offset Current IOS 10 pA 5
Output Current Source ISOURCE 82 mA Vs=5V 5
Output Current Sink ISINK 84 mA Vs=5V 5
Quiescent Current / Amplifier IQ 642 uA 5
Gain-Bandwidth Product GBP 5.5 MHz 5
Slew Rate SR 3.3 V/μs G = +1, 2V Output Step 5
Input Voltage Noise (peak-to-peak) enp-p 0.8 μVP-P f = 0.1Hz to 10Hz 5
Input Voltage Noise density en 39 nV/√Hz f = 1kHz 5
Input Voltage Noise density en 35 nV/√Hz f = 10kHz 5
Thermal Resistance Junction-to-Ambient (SOP-8) θJA 125 °C/W SOP-8, TA=+25℃ 3

CAD (KiCad official)

  • Symbol: GS8548-SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: gs8548-sr-etched.step / gs8548-sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gs8548-sr.step / gs8548-sr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Gainsil datasheet (16 pp, sha256 7be6bb67a57d2af7, retrieved 2026-11-04, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF