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Contents

README

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LP3997-30QVF

LOWPOWER(微源半导体) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4(1x1)

LP3997-30QVF from LOWPOWER(微源半导体), in a DFN-4(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground, placed as close to the pin as possible.
2 GND power_in Ground.
3 EN input Active high enable pin with an internal typical 50nA pull-up current source; driving EN over 1V or floating turns on the regulator, and driving it below 0.4V puts the regulator into shutdown mode.
4 VIN power_in Supply input pin that must be closely decoupled to GND with a 1μF or greater ceramic capacitor placed as close to the pin as possible.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer LOWPOWER(微源半导体)
Package DFN-4(1x1)
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Operation Range VIN 1.6 6 V 5
Output Voltage Accuracy (3.0V device) VOUT 2.955 3 3.045 V ILOAD=1mA 5
Load Current Limit ILIMIT 400 500 1000 mA VOUT=0.9*VOUT(Nom) 5
Input Voltage (recommended operating) VIN 1.6 6 V 4
Operating Junction Temperature Range (TJ) TJ -40 150 ℃ 4
Ambient Temperature Range TA -40 85 ℃ 4
VIN Pin to GND -0.3 6.5 V 4
VOUT, EN Pin to GND -0.3 V Printed as -0.3~VIN (upper limit is VIN) 4
Maximum Junction Temperature (TJ) TJ 150 ℃ 4
Operating Ambient Temperature Range (TA) TA -40 85 ℃ 4
Maximum Soldering Temperature (at leads) 260 ℃ at leads, 10 sec 4
ESD HBM (Human Body Model) 4 kV Human Body Model 4
ESD CDM (Charged Device Model) 1 kV Charged Device Model 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper practically possible to the respective LDO pins. Place ground return connections to the input and output capacitors, and to the LDO ground pin as close to each other as possible with a wide and compon 10

CAD (KiCad official)

  • Symbol: LP3997-30QVF
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN-4(1x1) (KiCad packages3D, STEP)
  • 3D model files: lp3997-30qvf-etched.step / lp3997-30qvf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp3997-30qvf.step / lp3997-30qvf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER(微源半导体) datasheet (19 pp, sha256 15263c9f00e270ed, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF