component
74HC32PW
Public Made by Adomby adom
Nexperia Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC32PW
Nexperia · Logic Gates · TSSOP-14
74HC32PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of gate 1; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 2 | 1B | input | Data input of gate 1; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 3 | 1Y | output | Data output of gate 1; output current is limited to ±25 mA between -0.5 V and VCC + 0.5 V. |
| 4 | 2A | input | Data input of gate 2; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 5 | 2B | input | Data input of gate 2; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 6 | 2Y | output | Data output of gate 2; output current is limited to ±25 mA between -0.5 V and VCC + 0.5 V. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3Y | output | Data output of gate 3; output current is limited to ±25 mA between -0.5 V and VCC + 0.5 V. |
| 9 | 3A | input | Data input of gate 3; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 10 | 3B | input | Data input of gate 3; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 11 | 4Y | output | Data output of gate 4; output current is limited to ±25 mA between -0.5 V and VCC + 0.5 V. |
| 12 | 4A | input | Data input of gate 4; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 13 | 4B | input | Data input of gate 4; the input has a clamp diode and its clamping current is limited to ±20 mA, so current-limiting resistors can interface it to voltages above VCC. |
| 14 | VCC | power_in | Supply voltage; the 74HC32 is specified for 2.0 V to 6.0 V and the absolute maximum rating is -0.5 V to +7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
74HC32PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc32pw-etched.step/74hc32pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc32pw.step/74hc32pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (12 pp, sha256
4e7b31a6e51ab80c, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).