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LM317MBSTT3G

Public Made by Adom

by adom

onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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LM317MBSTT3G

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-4

LM317MBSTT3G from onsemi, in a SOT-223-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Adjust passive Adjustment terminal across which the internal 1.25 V reference appears; adjust pin current is controlled to less than 100 µA, and an optional bypass capacitor to ground improves ripple rejection.
2 Vout power_out Regulated output terminal, adjustable from 1.2 V to 37 V and capable of supplying more than 500 mA; the heatsink surface is connected to this pin.
3 Vin power_in Unregulated input supply terminal; the input-to-output voltage differential must not exceed 40 V.
4 Heatsink tab passive Heatsink surface shown as terminal 4 in the case outline drawing, electrically connected to pin 2 (Vout).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-223-4
Category Power Management (PMIC)
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input-Output Voltage Differential VI−VO 40 Vdc 2
Maximum Junction Temperature TJMAX 150 °C 2
Storage Temperature Range Tstg -65 150 °C 2
Reference Voltage Vref 1.2 1.25 1.3 V 3.0 V ≤ VI − VO ≤ 40 V, 10 mA ≤ IL ≤ 0.5 A, PD ≤ Pmax 2
Load Regulation (VO ≤ 5.0 V) Regload 5 25 mV TA = 25°C, 10 mA ≤ IO ≤ 0.5 A, VO ≤ 5.0 V 2
Load Regulation (VO ≥ 5.0 V) Regload 0.1 0.5 % VO TA = 25°C, 10 mA ≤ IO ≤ 0.5 A, VO ≥ 5.0 V 2
Line Regulation Regline 0.01 0.04 %/V TA = 25°C, 3.0 V ≤ VI − VO ≤ 40 V 2
Line Regulation Regline 0.02 0.07 %/V 3.0 V ≤ VI−VO ≤ 40 V 2
Load Regulation (VO ≤ 5.0 V, over temperature) Regload 20 70 mV 10 mA ≤ IO ≤ 0.5 A, VO ≤ 5.0 V 2
Load Regulation (VO ≥ 5.0 V, over temperature) Regload 0.3 1.5 % VO 10 mA ≤ IO ≤ 0.5 A, VO ≥ 5.0 V 2
Adjustment Pin Current IAdj 50 100 µA 2
Adjustment Pin Current Change IAdj 0.2 5 µA 2.5 V ≤ VI − VO ≤ 40 V, 10 mA ≤ IL ≤ 0.5 A, PD ≤ Pmax 2
Maximum Output Current Imax 0.5 0.9 A VI − VO ≤ 15 V, PD ≤ Pmax 2
Maximum Output Current Imax 0.15 0.25 A VI − VO = 40 V, PD ≤ Pmax, TA = 25°C 2
Minimum Load Current to Maintain Regulation ILmin 3.5 10 mA VI − VO = 40 V 2
Ripple Rejection with CAdj RR 65 80 dB VO = 10 V, f = 120 Hz, CAdj = 10 µF 2
Long-Term Stability S 0.3 1 %/1.0 kHrs. TJ = Thigh; TA = 25°C for end-point measurements 2
Thermal Resistance, Junction-to-Air (ST suffix, SOT-223) θJA 245 °C/W 2
Thermal Resistance, Junction-to-Case (ST suffix, SOT-223) θJC 15 °C/W 2
Operating Junction Temperature Range (LM317MB Tlow to Thigh) TJ -40 125 °C LM317MB: Tlow to Thigh = −40°C to +125°C 2
Output Voltage Range VO 1.2 37 V 1

CAD (KiCad official)

  • Symbol: LM317MBSTT3G
  • Footprint: Package_TO_SOT_SMD:SOT-223
  • 3D model: SOT-223-4 (KiCad packages3D, STEP)
  • 3D model files: lm317mbstt3g-etched.step / lm317mbstt3g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm317mbstt3g.step / lm317mbstt3g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (14 pp, sha256 e5fe58e7a6060e1f, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF