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TPS2231PWR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS2231PWR
Texas Instruments · Power Distribution Switches · TSSOP-20
TPS2231PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SYSRST | input | Active-low system reset driven by the host that forces PERST to assert, with an internal pullup to AUXIN; logic input/output voltage absolute maximum is -0.3 to 6 V. |
| 2 | SHDN | input | Active-low shutdown input that turns off all voltage outputs and activates the discharge FETs when asserted, with an internal pullup to AUXIN. |
| 3 | STBY | input | Active-low standby input that, when asserted after card insertion, turns off the 3.3-V and 1.5-V switches while keeping AUX on, with an internal pullup to AUXIN. |
| 4 | 3.3VIN | power_in | 3.3-V input supplying the 3.3VOUT switch; absolute maximum VI(3.3VIN) is -0.3 to 6 V. |
| 5 | 3.3VIN | power_in | 3.3-V input supplying the 3.3VOUT switch; absolute maximum VI(3.3VIN) is -0.3 to 6 V. |
| 6 | 3.3VOUT | power_out | Switched output that delivers 0 V, 3.3 V or high impedance to the card; absolute maximum VO(3.3VOUT) is -0.3 to 6 V and output current is internally limited. |
| 7 | 3.3VOUT | power_out | Switched output that delivers 0 V, 3.3 V or high impedance to the card; absolute maximum VO(3.3VOUT) is -0.3 to 6 V and output current is internally limited. |
| 8 | PERST | output | Logic-level power-good output to slot 0 (with delay) that remains asserted low until all rails are within tolerance; PERST sink/source current is limited to 10 mA absolute maximum. |
| 9 | NC | unconnected | No internal connection. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | CPUSB | input | Card-present input for USB cards; a logic low indicates the card supports USB functions, with an internal pullup to AUXIN. |
| 12 | CPPE | input | Card-present input for PCI Express cards; a logic low indicates the card supports PCI Express functions, with an internal pullup to AUXIN. |
| 13 | 1.5VOUT | power_out | Switched output that delivers 0 V, 1.5 V or high impedance to the card; absolute maximum VO(1.5VOUT) is -0.3 to 6 V and output current is internally limited. |
| 14 | 1.5VOUT | power_out | Switched output that delivers 0 V, 1.5 V or high impedance to the card; absolute maximum VO(1.5VOUT) is -0.3 to 6 V and output current is internally limited. |
| 15 | 1.5VIN | power_in | 1.5-V input supplying the 1.5VOUT switch; absolute maximum VI(1.5VIN) is -0.3 to 6 V. |
| 16 | 1.5VIN | power_in | 1.5-V input supplying the 1.5VOUT switch; absolute maximum VI(1.5VIN) is -0.3 to 6 V. |
| 17 | AUXOUT | power_out | Switched output that delivers 0 V, AUX or high impedance to the card; absolute maximum VO(AUXOUT) is -0.3 to 6 V and output current is internally limited. |
| 18 | AUXIN | power_in | AUX input that supplies the AUXOUT switch and chip power; absolute maximum VI(AUXIN) is -0.3 to 6 V. |
| 19 | RCLKEN | bidirectional | Reference clock enable that acts as a power-good output to the host for slot 0 (no delay, open drain) and, when held low externally, as an input that delays PERST de-assertion; it is internally pulled up to AUXIN and must not be driven high. |
| 20 | OC | output | Open-drain overcurrent status output for slot 0 that is pulled low when any of the AUX, 3.3-V or 1.5-V switches is in overcurrent; OC sink current is limited to 10 mA absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range for card power, 3.3VIN | VI(3.3VIN) | -0.3 | 6 | V | 2 | ||
| Input voltage range for card power, 1.5VIN | VI(1.5VIN) | -0.3 | 6 | V | 2 | ||
| Input voltage range, AUXIN | VI(AUXIN) | -0.3 | 6 | V | 2 | ||
| Logic input/output voltage | -0.3 | 6 | V | 2 | |||
| Output voltage range, 3.3VOUT | VO(3.3VOUT) | -0.3 | 6 | V | 2 | ||
| Output voltage range, 1.5VOUT | VO(1.5VOUT) | -0.3 | 6 | V | 2 | ||
| Output voltage range, AUXOUT | VO(AUXOUT) | -0.3 | 6 | V | 2 | ||
| OC sink current | 10 | mA | 2 | ||||
| PERST sink/source current | 10 | mA | 2 | ||||
| Operating virtual junction temperature range | TJ | -40 | 120 | °C | 2 | ||
| Storage temperature range | Tstg | -55 | 150 | °C | 2 | ||
| Lead temperature | 260 | °C | 1.6 mm (1/16 inch) from case for 10 seconds | 2 | |||
| Electrostatic discharge, human body model (HBM) | 2 | kV | MIL-STD-883C | 2 | |||
| Electrostatic discharge, charge device model (CDM) | 500 | V | Charge device model | 2 | |||
| Input voltage, 3.3VIN | VI(3.3VIN) | 3 | 3.6 | V | 3.3VIN is only required for its respective functions | 3 | |
| Input voltage, 1.5VIN | VI(1.5VIN) | 1.35 | 1.65 | V | 1.5VIN is only required for its respective functions | 3 | |
| Input voltage, AUXIN | VI(AUXIN) | 3 | 3.6 | V | AUXIN is required for all circuit operations | 3 | |
| Continuous output current, 3.3VOUT | IO(3.3VOUT) | 0 | 1.3 | A | 3 | ||
| Continuous output current, 1.5VOUT | IO(1.5VOUT) | 0 | 650 | mA | TJ = 120°C | 3 | |
| Continuous output current, AUXOUT | IO(AUXOUT) | 0 | 275 | mA | 3 | ||
| Operating virtual junction temperature | TJ | -40 | 120 | °C | 3 | ||
| Dissipation rating, PW (20) package power at TA ≤ 25°C | 704.2 | mW | TA ≤ 25°C; JEDEC low-k board; maximum junction temperature 120°C | 3 | |||
| Power switch resistance, 3.3VIN to 3.3VOUT | 45 | mΩ | TJ = 25°C, I = 1300 mA each | 3 | |||
| Power switch resistance, 3.3VIN to 3.3VOUT | 68 | mΩ | TJ = 100°C, I = 1300 mA each | 3 | |||
| Power switch resistance, 1.5VIN to 1.5VOUT | 46 | mΩ | TJ = 25°C, I = 650 mA each | 3 | |||
| Power switch resistance, 1.5VIN to 1.5VOUT | 70 | mΩ | TJ = 100°C, I = 650 mA each | 3 | |||
| Power switch resistance, AUXIN to AUXOUT | 120 | mΩ | TJ = 25°C, I = 275 mA each | 3 | |||
| Power switch resistance, AUXIN to AUXOUT | 200 | mΩ | TJ = 100°C, I = 275 mA each | 3 | |||
| Discharge resistance on 3.3V/1.5V/AUX outputs | R(DIS_FET) | 100 | 500 | Ω | VI(/SHDNx) = 0 V, I(discharge) = 1 mA | 3 | |
| Short-circuit output current, 3.3VOUT (steady-state) | IOS(3.3VOUT) | 1.35 | 2 | 2.5 | A | Output powered into a short; TJ (-40, 120°C] | 3 |
| Short-circuit output current, 1.5VOUT (steady-state) | IOS(1.5VOUT) | 0.67 | 1 | 1.3 | A | Output powered into a short; TJ (-40, 120°C] | 3 |
| Short-circuit output current, AUXOUT (steady-state) | IOS(AUXOUT) | 275 | 450 | 600 | mA | Output powered into a short; TJ (-40, 120°C] | 3 |
| Thermal trip point, rising temperature, not in overcurrent condition | TJ | 155 | 165 | °C | Not in overcurrent condition | 3 | |
| Thermal trip point, overcurrent condition shutdown | TJ | 120 | 130 | °C | Overcurrent condition | 3 | |
| Current-limit response time, VO(3.3VOUT) with 100-mΩ short | 43 | 100 | μs | From short to the 1st threshold within 1.1 μs of final current limit, TJ = 25°C | 3 | ||
| Current-limit response time, VO(1.5VOUT) with 100-mΩ short, TPS2231 | 100 | 140 | μs | From short to the 1st threshold within 1.1 μs of final current limit, TJ = 25°C | 3 | ||
| Current-limit response time, VO(AUXOUT) with 100-mΩ short | 38 | 100 | μs | From short to the 1st threshold within 1.1 μs of final current limit, TJ = 25°C | 3 | ||
| AUXIN quiescent current, normal operation | II(AUXIN) | 85 | 150 | μA | Outputs unloaded, TJ [-40, 120°C]; excludes CPPEx and CPUSBx logic pullup currents | 4 | |
| 3.3VIN quiescent current, normal operation | II(3.3VIN) | 10 | 15 | μA | Outputs unloaded, TJ [-40, 120°C]; excludes CPPEx and CPUSBx logic pullup currents | 4 | |
| 1.5VIN quiescent current, normal operation | II(1.5VIN) | 2.5 | 10 | μA | Outputs unloaded, TJ [-40, 120°C]; excludes CPPEx and CPUSBx logic pullup currents | 4 | |
| AUXIN total input quiescent current, normal operation | II(AUXIN) | 120 | 210 | μA | Outputs unloaded, TJ [-40, 120°C]; includes CPPEx and CPUSBx logic pullup currents | 4 | |
| 3.3VIN total input quiescent current, normal operation | II(3.3VIN) | 10 | 15 | μA | Outputs unloaded, TJ [-40, 120°C]; includes CPPEx and CPUSBx logic pullup currents | 4 | |
| 1.5VIN total input quiescent current, normal operation | II(1.5VIN) | 2.5 | 10 | μA | Outputs unloaded, TJ [-40, 120°C]; includes CPPEx and CPUSBx logic pullup currents | 4 | |
| AUXIN input quiescent current, shutdown mode | II(AUXIN) | 144 | 270 | μA | Shutdown mode, CPUSB = CPPE = 0 V, SHDN = 0 V (discharge FETs on), TJ [-40, 120°C] | 4 | |
| 3.3VIN input quiescent current, shutdown mode | II(3.3VIN) | 3.5 | 10 | μA | Shutdown mode, CPUSB = CPPE = 0 V, SHDN = 0 V (discharge FETs on), TJ [-40, 120°C] | 4 | |
| 1.5VIN input quiescent current, shutdown mode | II(1.5VIN) | 0.5 | 10 | μA | Shutdown mode, CPUSB = CPPE = 0 V, SHDN = 0 V (discharge FETs on), TJ [-40, 120°C] | 4 | |
| PERST assertion threshold, 3.3VOUT falling | 2.7 | 3 | V | PERST asserted when any output voltage falls below the threshold | 4 | ||
| PERST assertion threshold, AUXOUT falling | 2.7 | 3 | V | PERST asserted when any output voltage falls below the threshold | 4 | ||
| PERST assertion threshold, 1.5VOUT falling | 1.2 | 1.35 | V | PERST asserted when any output voltage falls below the threshold | 4 | ||
| Logic input high-level voltage | 2 | V | 4 | ||||
| Logic input low-level voltage | 0.8 | V | 4 | ||||
| RCLKEN output low voltage | 0.4 | V | IO(RCLKEN) = 60 μA | 4 | |||
| PERST output low voltage | 0.4 | V | IO(PERST) = 500 μA | 5 | |||
| PERST output high voltage | 2.4 | V | 5 | ||||
| OC output low voltage | 0.4 | V | IO(/OC) = 2 mA | 5 | |||
| 3.3VIN UVLO, level below which 3.3VIN and 1.5VIN switches are off | 2.6 | 2.9 | V | 5 | |||
| 1.5VIN UVLO, level below which 3.3VIN and 1.5VIN switches are off | 1 | 1.25 | V | 5 | |||
| AUXIN UVLO, level below which all switches are off | 2.6 | 2.9 | V | 5 | |||
| Dissipation rating derating factor, PW (20) above TA = 25°C | 7.41 | mW/°C | Above TA = 25°C; JEDEC low-k board; maximum junction temperature 120°C | 3 | |||
| UVLO hysteresis | 100 | mV | 5 |
CAD (KiCad official)
- Symbol:
TPS2231PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
tps2231pwr-etched.step/tps2231pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2231pwr.step/tps2231pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
c6bc7fcb544329ed, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).