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TPS70751PWPR
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS70751PWPR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20-EP
TPS70751PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection; the pin is not internally connected and may be left unconnected. |
| 2 | VIN1 | power_in | Input voltage of regulator 1 (up to 250 mA); internal bias for both regulators is powered from VIN1, and the regulators stay off until VIN1 reaches 2.5 V (UVLO). |
| 3 | VIN1 | power_in | Input voltage of regulator 1 (up to 250 mA); internal bias for both regulators is powered from VIN1, and the regulators stay off until VIN1 reaches 2.5 V (UVLO). |
| 4 | MR1 | input | Manual reset input 1, active low, with an internal 6-µA pull-up to VIN1; pulling it low triggers a POR/RESET, and the absolute maximum voltage is VIN1. |
| 5 | MR2 | input | Manual reset input 2, active low, with an internal 6-µA pull-up to VIN1; pulling it low triggers a POR/RESET, and the absolute maximum voltage is VIN1. |
| 6 | EN | input | Active-low enable; driving EN high shuts down both regulators (input current about 1 µA at TJ = +25°C), and driving it low enables the device. Absolute maximum voltage is 7 V. |
| 7 | SEQ | input | Power-up sequence select: high or open sets VOUT2 to power up first (VOUT1 starts when VOUT2 reaches about 83%), low sets VOUT1 to power up first; internal 6-µA pull-up to VIN1 and absolute maximum voltage is VIN1. |
| 8 | GND | power_in | Ground reference for the device, tied to network ground. |
| 9 | VIN2 | power_in | Input voltage of regulator 2 (up to 125 mA output); absolute maximum input voltage is 7 V. |
| 10 | VIN2 | power_in | Input voltage of regulator 2 (up to 125 mA output); absolute maximum input voltage is 7 V. |
| 11 | NC | unconnected | No connection; the pin is not internally connected and may be left unconnected. |
| 12 | VOUT2 | power_out | Output of regulator 2 (up to 125 mA); the output is discharged internally when the regulator is disabled. |
| 13 | VOUT2 | power_out | Output of regulator 2 (up to 125 mA); the output is discharged internally when the regulator is disabled. |
| 14 | VSENSE2/FB2 | input | Regulator 2 output voltage sense on fixed-voltage versions (connect to VOUT as close as possible) or feedback input on the adjustable version (connect to the external divider); keep the connection short and avoid RC filtering. |
| 15 | RESET | output | Open-drain, active-low SVS/power-on reset output reflecting VOUT2 and MR1/MR2 status; it requires a pull-up resistor and may be left floating if unused. |
| 16 | PG1 | output | Open-drain power-good output for regulator 1, low when VOUT1 is below 95% of its regulated voltage; it requires a pull-up resistor. |
| 17 | VSENSE1/FB1 | input | Regulator 1 output voltage sense on fixed-voltage versions (connect to VOUT as close as possible) or feedback input on the adjustable version (connect to the external divider); keep the connection short and avoid RC filtering. |
| 18 | VOUT1 | power_out | Output of regulator 1 (up to 250 mA); the output is discharged internally when the regulator is disabled. |
| 19 | VOUT1 | power_out | Output of regulator 1 (up to 250 mA); the output is discharged internally when the regulator is disabled. |
| 20 | NC | unconnected | No connection; the pin is not internally connected and may be left unconnected. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS70751PWPR - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps70751pwpr-etched.step/tps70751pwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps70751pwpr.step/tps70751pwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
47c201c539729fd2, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).