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Contents

README

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MCP39F511AT-E

Microchip Tech · Energy Metering ICs · QFN-28-EP(5x5)

MCP39F511AT-E from Microchip Tech, in a QFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EVENT1 output Event 1 output flag pin, configured through the Event Configuration register to signal internal conditions.
2 NC unconnected No connect; must be left floating.
3 NC unconnected No connect; must be left floating.
4 UART_RX input UART receive pin for the asynchronous full-duplex serial interface, eight data bits with start and stop bit.
5 COMMONA passive Internal common connection A; must be connected to pin 13 (COMMONB) in the application.
6 OSCI input Oscillator crystal connection or external clock input; if no crystal or external clock is detected the device uses the internal 4 MHz oscillator.
7 OSCO output Oscillator crystal connection pin; appropriate load capacitance should be connected for proper operation.
8 NC unconnected No connect; must be left floating.
9 NC unconnected No connect; must be left floating.
10 RESET input Active-low Schmitt-triggered reset that places the Delta-Sigma ADCs, PGA, internal VREF and AFE blocks in reset when pulled low.
11 AVDD power_in Analog power supply pin, to be maintained between +2.7V and +3.6V for specified operation, with 0.1 µF ceramic bypass recommended.
12 UART_TX output UART transmit pin for the asynchronous full-duplex serial interface, eight data bits with start and stop bit.
13 COMMONB passive Internal common connection B; must be connected to pin 5 (COMMONA) in the application.
14 PWM output Dedicated digital PWM output controlled through the PWM Frequency and PWM Duty Cycle registers.
15 EVENT2 output Event 2 output flag pin, configured through the Event Configuration register to signal internal conditions.
16 I1+ input Noninverting current channel input for the 24-bit Delta-Sigma ADC; linear range is ±600 mVPEAK/GAIN with VREF = 1.2V and absolute maximum ±1V without distortion, ±6V without breaking.
17 I1- input Inverting current channel input for the 24-bit Delta-Sigma ADC; linear range is ±600 mVPEAK/GAIN with VREF = 1.2V and absolute maximum ±1V without distortion, ±6V without breaking.
18 V1- input Inverting voltage channel input for the 24-bit Delta-Sigma ADC; linear range is ±600 mVPEAK/GAIN with VREF = 1.2V and absolute maximum ±1V without distortion, ±2V without breaking.
19 V1+ input Noninverting voltage channel input for the 24-bit Delta-Sigma ADC; linear range is ±600 mVPEAK/GAIN with VREF = 1.2V and absolute maximum ±1V without distortion, ±2V without breaking.
20 AN_IN input Analog input to the SAR ADC, used for temperature measurement and compensation or as a general-purpose ADC input.
21 AGND power_in Analog ground return path for the internal analog circuitry (ADCs, PGA, voltage reference, POR).
22 ZCD output Zero crossing detection logic output that transitions at each zero crossing of the voltage channel input.
23 REFIN+/OUT bidirectional Noninverting voltage reference input and internal reference output pin.
24 DGND power_in Digital ground return path for the internal digital circuitry; connected to the exposed pad.
25 DVDD power_in Digital power supply pin for the internal digital circuitry.
26 MCLR input Master clear input for the device.
27 DGND power_in Digital ground return path for the internal digital circuitry; connected to the exposed pad.
28 DR unconnected Data Ready pin; must be left floating.
29 EP power_in Exposed thermal pad, to be connected to pins 24 and 27 (DGND).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-28-EP(5x5)
Category ADC/DAC/Data Conversion
Pins 29

CAD (KiCad official)

  • Symbol: MCP39F511AT-E
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: QFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: mcp39f511at-e-etched.step / mcp39f511at-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp39f511at-e.step / mcp39f511at-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (68 pp, sha256 ffa42d2cb7cceac6, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF