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Contents

README

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HT7036

HiTrend Tech Shanghai · Energy Metering · LQFP-32(7x7)

HT7036 from HiTrend Tech Shanghai, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 V1P input Channel 1 (current channel) positive fully differential analog input; normal maximum signal level is ±0.7Vp, with an on-chip PGA and ESD protection.
2 V1N input Channel 1 (current channel) negative fully differential analog input; normal maximum signal level is ±0.7Vp, with an on-chip PGA and ESD protection.
3 REFCAP output Reference output, typically 1.2V; can be used externally and should be decoupled with 10µF in parallel with 0.1µF ceramic.
4 V3P input Channel 3 (current channel) positive fully differential analog input; normal maximum signal level is ±0.7Vp, with an on-chip PGA and ESD protection.
5 V3N input Channel 3 (current channel) negative fully differential analog input; normal maximum signal level is ±0.7Vp, with an on-chip PGA and ESD protection.
6 AGND power_in Analog ground reference for the ADC and voltage reference; must be connected to the PCB analog ground.
7 V5P input Channel 5 (current channel) positive fully differential analog input; normal maximum signal level is ±0.7Vp, with an on-chip PGA and ESD protection.
8 V5N input Channel 5 (current channel) negative fully differential analog input; normal maximum signal level is ±0.7Vp, with an on-chip PGA and ESD protection.
9 AGND power_in Analog ground reference for the ADC and voltage reference; must be connected to the PCB analog ground.
10 AVCC power_in Analog supply, normal operation at 3.3V ±10% per the pin table; should be decoupled with 10µF in parallel with 0.1µF ceramic.
11 V2P input Channel 2 (voltage channel) positive fully differential analog input; normal maximum input is ±0.7Vp, with ESD protection.
12 V2N input Channel 2 (voltage channel) negative fully differential analog input; normal maximum input is ±0.7Vp, with ESD protection.
13 AGND power_in Analog ground reference for the ADC and voltage reference; must be connected to the PCB analog ground.
14 V4P input Channel 4 (voltage channel) positive fully differential analog input; normal maximum input is ±0.7Vp, with ESD protection.
15 V4N input Channel 4 (voltage channel) negative fully differential analog input; normal maximum input is ±0.7Vp, with ESD protection.
16 AVCC power_in Analog supply, normal operation at 3.3V ±10% per the pin table; should be decoupled with 10µF in parallel with 0.1µF ceramic.
17 V6P input Channel 6 (voltage channel) positive fully differential analog input; normal maximum input is ±0.7Vp, with ESD protection.
18 V6N input Channel 6 (voltage channel) negative fully differential analog input; normal maximum input is ±0.7Vp, with ESD protection.
19 GND power_in Digital ground pin.
20 CF1 output Frequency verification output giving high-level pulses for active power; can also be used for active energy metering.
21 CF2 output Frequency verification output giving high-level pulses for reactive power; can also be used for reactive energy metering.
22 SLEEP input Active-high sleep mode control: pulling high enters sleep mode (stated power consumption 1µA), pulling low returns the chip to normal operation.
23 GND power_in Digital ground pin.
24 VCC power_in Digital supply, normal operation at 3.3V ±5%; should be decoupled with 10µF in parallel with 100nF ceramic.
25 CS input SPI chip select from the host MCU, active low; when high, DOUT is high impedance; Schmitt trigger input with internally programmable 300kΩ pull-up or floating.
26 SCLK input SPI serial clock from the host MCU; Schmitt trigger input with internally programmable 300kΩ pull-up or floating.
27 DIN input SPI serial data input from the host MCU; data is valid on the falling edge of SCLK; Schmitt trigger input with internally programmable 300kΩ pull-up or floating.
28 DOUT tri_state SPI serial data output; data is released on the rising edge of SCLK and is valid on the falling edge; high impedance when CS is high.
29 VDD power_out Digital 1.8V output; should be decoupled with an external 10µF tantalum capacitor in parallel with 100nF ceramic.
30 OSCI input System crystal oscillator input or external system clock input, recommended 5.5296MHz; internal oscillator circuit and 10MΩ feedback resistor are integrated.
31 OSCO output Crystal oscillator output.
32 RESET input External active-low reset with Schmitt trigger input and internal 47kΩ pull-up; a low level longer than 20µs puts the chip into reset.

Key specifications

Parameter Value
Manufacturer HiTrend Tech Shanghai
Package LQFP-32(7x7)
Category Data Acquisition
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
数字电源电压Vcc Vcc 3 3.3 3.6 V 63
模拟电源电压AVcc AVcc 3 3.3 3.6 V 63
参考电压 1.17 1.195 1.22 V 63
工作温度范围 -40 85 度 63
存储温度范围 -65 150 度 63

CAD (KiCad official)

  • Symbol: HT7036
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: ht7036-etched.step / ht7036-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht7036.step / ht7036.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HiTrend Tech Shanghai datasheet (68 pp, sha256 42a79959f97b7e56, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF