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Contents

README

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SN65HVD10QDREP

Texas Instruments · RS-485 / RS-422 ICs · SOIC-8

SN65HVD10QDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R output Receiver output; driven high (logic H) when the differential input VID = VA-VB is >= -0.01 V and low when VID <= -0.2 V, with failsafe high output for open-circuit, idle, or shorted-bus conditions; forced to high impedance when RE is high.
2 RE input Active-low receiver output enable; RE at logic low enables the receiver output R, RE at logic high (or VCC) places R in high-impedance state and puts the receiver in low-current standby along with DE high.
3 DE input Active-high driver output enable; DE at logic high enables the differential driver outputs A and B, DE at logic low forces the driver outputs to high impedance (disabled).
4 D input Driver data input; a high level drives output A high and B low, a low level (or open input with DE high) drives A low and B high.
5 GND power_in Device ground reference terminal, network ground for all voltage measurements except differential I/O bus voltages.
6 A bidirectional Noninverting driver output / receiver true differential input, part of the differential bus I/O port; bus terminal voltage range -7 V to 12 V, with short-circuit protection over that range and withstands transient pulses of -50 V to 50 V through 100 ohm.
7 B bidirectional Inverting driver output / receiver complementary differential input, part of the differential bus I/O port; bus terminal voltage range -7 V to 12 V, with short-circuit protection over that range and withstands transient pulses of -50 V to 50 V through 100 ohm.
8 VCC power_in Positive supply voltage input; recommended operating range 3 V to 3.6 V (absolute maximum -0.3 V to 6 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface
Pins 8

CAD (KiCad official)

  • Symbol: SN65HVD10QDREP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: sn65hvd10qdrep-etched.step / sn65hvd10qdrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd10qdrep.step / sn65hvd10qdrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 f1281ae52fc19591, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF