component
CD74ACT374M96
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74ACT374M96
Texas Instruments · Flip Flops · SOIC-20-300mil
CD74ACT374M96 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output enable input; places Q outputs in high-impedance state when HIGH |
| 2 | 1Q | tri_state | Tristate output 1; set to D1 input level on positive clock edge when OE is LOW |
| 3 | 1D | input | Data input 1; captured into flip-flop 1 on LOW-to-HIGH clock transition |
| 4 | 2D | input | Data input 2; captured into flip-flop 2 on LOW-to-HIGH clock transition |
| 5 | 2Q | tri_state | Tristate output 2; set to D2 input level on positive clock edge when OE is LOW |
| 6 | 3Q | tri_state | Tristate output 3; set to D3 input level on positive clock edge when OE is LOW |
| 7 | 3D | input | Data input 3; captured into flip-flop 3 on LOW-to-HIGH clock transition |
| 8 | 4D | input | Data input 4; captured into flip-flop 4 on LOW-to-HIGH clock transition |
| 9 | 4Q | tri_state | Tristate output 4; set to D4 input level on positive clock edge when OE is LOW |
| 10 | GND | power_in | Ground reference potential |
| 11 | CLK | input | Clock input; positive transition captures data from D inputs into flip-flops |
| 12 | 5Q | tri_state | Tristate output 5; set to D5 input level on positive clock edge when OE is LOW |
| 13 | 5D | input | Data input 5; captured into flip-flop 5 on LOW-to-HIGH clock transition |
| 14 | 6D | input | Data input 6; captured into flip-flop 6 on LOW-to-HIGH clock transition |
| 15 | 6Q | tri_state | Tristate output 6; set to D6 input level on positive clock edge when OE is LOW |
| 16 | 7Q | tri_state | Tristate output 7; set to D7 input level on positive clock edge when OE is LOW |
| 17 | 7D | input | Data input 7; captured into flip-flop 7 on LOW-to-HIGH clock transition |
| 18 | 8D | input | Data input 8; captured into flip-flop 8 on LOW-to-HIGH clock transition |
| 19 | 8Q | tri_state | Tristate output 8; set to D8 input level on positive clock edge when OE is LOW |
| 20 | VCC | power_in | Supply voltage input; 4.5V to 5.5V for ACT series devices |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
CD74ACT374M96 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
cd74act374m96-etched.step/cd74act374m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74act374m96.step/cd74act374m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
9c177479ef16b7a3, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).