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Contents

README

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74VHC08PW-Q100J

Nexperia · Logic Gates · TSSOP-14

74VHC08PW-Q100J from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 data input A. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC. VIH >= 3.85 V and VIL <= 1.65 V at VCC = 5.5 V; typical input capacitance 3.0 pF.
2 1B input Gate 1 data input B. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC. VIH >= 3.85 V and VIL <= 1.65 V at VCC = 5.5 V; typical input capacitance 3.0 pF.
3 1Y output Gate 1 AND-function data output (1Y = 1A AND 1B). Push-pull CMOS output; VOH >= 3.94 V at IO = -8.0 mA / VCC = 4.5 V, VOL <= 0.36 V at IO = 8.0 mA / VCC = 4.5 V.
4 2A input Gate 2 data input A. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC. Same static characteristics as the other A inputs.
5 2B input Gate 2 data input B. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC. Same static characteristics as the other B inputs.
6 2Y output Gate 2 AND-function data output (2Y = 2A AND 2B). Push-pull CMOS output, same drive as other Y outputs.
7 GND power_in Ground reference (0 V). All voltages in the datasheet are referenced to this pin. Maximum ground current -75 mA.
8 3Y output Gate 3 AND-function data output (3Y = 3A AND 3B). Push-pull CMOS output, same drive as other Y outputs.
9 3A input Gate 3 data input A. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC.
10 3B input Gate 3 data input B. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC.
11 4Y output Gate 4 AND-function data output (4Y = 4A AND 4B). Push-pull CMOS output, same drive as other Y outputs.
12 4A input Gate 4 data input A. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC.
13 4B input Gate 4 data input B. CMOS-level Schmitt-trigger input; can accept voltages higher than VCC.
14 VCC power_in Positive supply voltage. Recommended operating range 2.0 V to 5.5 V (74VHC08-Q100); absolute maximum -0.5 V to +7.0 V. Typical quiescent supply current ICC = 2.0 uA at VCC = 5.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • 74VHC08PW-Q100J
  • 74VHC08PW-Q100JD-Q100
  • 74VHC08PW-Q100JBQ-Q100

CAD (KiCad official)

  • Symbol: 74VHC08PW-Q100J
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 ca39632d8aeb0983, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF