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XL74LS139

Public Made by Adom

by adom

XINLUDA Signal Switches, Multiplexers, Decoders, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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XL74LS139

XINLUDA · Signal Switches, Multiplexers, Decoders · SOP-16

XL74LS139 from XINLUDA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1G input Active-low enable input for decoder 1; can be used as a data line in demultiplexing applications.
2 1A input Select input A (LSB) of decoder 1; fully buffered, one normalized load, Schottky-clamped, VIH min 2 V and VIL max 0.8 V.
3 1B input Select input B (MSB) of decoder 1; fully buffered, one normalized load, Schottky-clamped, VIH min 2 V and VIL max 0.8 V.
4 1Y0 output Active-low output 0 of decoder 1; low when enabled and select BA = LL, IOL max 8 mA, IOH max -0.4 mA.
5 1Y1 output Active-low output 1 of decoder 1; low when enabled and select BA = LH, IOL max 8 mA, IOH max -0.4 mA.
6 1Y2 output Active-low output 2 of decoder 1; low when enabled and select BA = HL, IOL max 8 mA, IOH max -0.4 mA.
7 1Y3 output Active-low output 3 of decoder 1; low when enabled and select BA = HH, IOL max 8 mA, IOH max -0.4 mA.
8 GND power_in Ground reference (0 V) for the device.
9 2Y3 output Active-low output 3 of decoder 2; low when enabled and select BA = HH, IOL max 8 mA, IOH max -0.4 mA.
10 2Y2 output Active-low output 2 of decoder 2; low when enabled and select BA = HL, IOL max 8 mA, IOH max -0.4 mA.
11 2Y1 output Active-low output 1 of decoder 2; low when enabled and select BA = LH, IOL max 8 mA, IOH max -0.4 mA.
12 2Y0 output Active-low output 0 of decoder 2; low when enabled and select BA = LL, IOL max 8 mA, IOH max -0.4 mA.
13 2B input Select input B (MSB) of decoder 2; fully buffered, one normalized load, Schottky-clamped, VIH min 2 V and VIL max 0.8 V.
14 2A input Select input A (LSB) of decoder 2; fully buffered, one normalized load, Schottky-clamped, VIH min 2 V and VIL max 0.8 V.
15 2G input Active-low enable input for decoder 2; can be used as a data line in demultiplexing applications.
16 VCC power_in Supply voltage, recommended 4.75 V to 5.25 V (5 V nominal), absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 5
High-level input voltage VIH 2 V 5
Low-level input voltage VIL 0.8 V 5
High-level output current IOH -0.4 mA 5
Low-level output current IOL 8 mA 5
Operating free-air temperature TA 0 70 °C 5
Supply voltage VCC 7 V 4
Input voltage (74LS139) VI 7 V 4
Operating free-air temperature range (SOP, DIP package) 0 70 °C 4
Storage temperature range Tstg -65 150 °C 4
Input clamp voltage VIK -1.5 V VCC = MIN, II = −18 mA 5
High-level output voltage VOH 2.7 3.4 V VCC = MIN, VIL = 0.8 V, VIH = 2 V, IOH = −400 A 5
Low-level output voltage VOL 0.25 0.4 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 4 mA 5
Low-level output voltage VOL 0.35 0.5 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 8 mA 5
Input current at maximum input voltage II 0.1 mA VCC = MAX, VI = 7 V 5
High-level input current IIH 20 µA VCC = MAX, VI = 2.7 V 5
Low-level input current IIL -0.4 mA VCC = MAX, VI = 0.4 V 5
Short-circuit output current IOS -20 -100 mA VCC = MAX 5
Supply current ICC 6.8 11 mA VCC = MAX, Outputs enabled and open 5
Propagation delay time, low-to-high-level output, Binary Select to Any output (2 levels of delay) tPLH 13 20 ns VCC = 5 V, TA = 25°C; CL = 15 pF, RL = 2 k 6
Propagation delay time, high-to-low-level output, Binary Select to Any output (2 levels of delay) tPHL 22 33 ns VCC = 5 V, TA = 25°C; CL = 15 pF, RL = 2 k 6
Propagation delay time, low-to-high-level output, Binary Select to Any output (3 levels of delay) tPLH 18 29 ns VCC = 5 V, TA = 25°C; CL = 15 pF, RL = 2 k 6
Propagation delay time, high-to-low-level output, Binary Select to Any output (3 levels of delay) tPHL 25 38 ns VCC = 5 V, TA = 25°C; CL = 15 pF, RL = 2 k 6
Propagation delay time, low-to-high-level output, Enable to Any output (2 levels of delay) tPLH 16 24 ns VCC = 5 V, TA = 25°C; CL = 15 pF, RL = 2 k 6
Propagation delay time, high-to-low-level output, Enable to Any output (2 levels of delay) tPHL 21 32 ns VCC = 5 V, TA = 25°C; CL = 15 pF, RL = 2 k 6

CAD (KiCad official)

  • Symbol: XL74LS139
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: xl74ls139-etched.step / xl74ls139-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl74ls139.step / xl74ls139.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (8 pp, sha256 e2ff59f97cf6c429, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF