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AD5725ARSZ-1500RL7

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Analog Devices Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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AD5725ARSZ-1500RL7

Analog Devices · Digital To Analog Converters (DACs) · SSOP-28

AD5725ARSZ-1500RL7 from Analog Devices, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREFP input Positive DAC reference input that defines the full-scale output voltage, with an allowable range of AVDD − 2.5 V to VREFN + 2.5 V.
2 VOUTB output Buffered analog output voltage of DAC B.
3 VOUTA output Buffered analog output voltage of DAC A.
4 AVSS power_in Negative analog supply pin, with voltage ranging from 0 V to −15 V.
5 DGND power_in Digital ground pin.
6 CLR input Active-low input that sets the input and DAC registers to zero scale (0x000) for the AD5725-1 or midscale (0x800) for the AD5725.
7 LDAC input Active-low load DAC input; taking it low while CS is high updates all output registers simultaneously, with a minimum pulse width of 10 ns.
8 DB0 bidirectional Data bit 0 (LSB) of the 12-bit parallel data bus used for writing and reading back data.
9 DB1 bidirectional Data bit 1 of the 12-bit parallel data bus used for writing and reading back data.
10 DB2 bidirectional Data bit 2 of the 12-bit parallel data bus used for writing and reading back data.
11 DB3 bidirectional Data bit 3 of the 12-bit parallel data bus used for writing and reading back data.
12 DB4 bidirectional Data bit 4 of the 12-bit parallel data bus used for writing and reading back data.
13 DB5 bidirectional Data bit 5 of the 12-bit parallel data bus used for writing and reading back data.
14 DB6 bidirectional Data bit 6 of the 12-bit parallel data bus used for writing and reading back data.
15 DB7 bidirectional Data bit 7 of the 12-bit parallel data bus used for writing and reading back data.
16 DB8 bidirectional Data bit 8 of the 12-bit parallel data bus used for writing and reading back data.
17 DB9 bidirectional Data bit 9 of the 12-bit parallel data bus used for writing and reading back data.
18 DB10 bidirectional Data bit 10 of the 12-bit parallel data bus used for writing and reading back data.
19 DB11 bidirectional Data bit 11 (MSB) of the 12-bit parallel data bus used for writing and reading back data.
20 R/W input Read/write pin that is active low to write data to the DAC and active high to read back data on the data bit pins when VL is connected to +5 V.
21 A1 input Address bit 1, which together with A0 selects DAC register A (00) through D (11).
22 A0 input Address bit 0, which together with A1 selects DAC register A (00) through D (11).
23 CS input Active-low chip select pin that enables decoding of the write and read operations.
24 VL power_in Voltage supply for the readback function that sets the digital output level, normally connected to +5 V; it can be left open-circuit if readback is not used.
25 AVDD power_in Positive analog supply pin, with voltage ranging from +5 V to +15 V.
26 VOUTD output Buffered analog output voltage of DAC D.
27 VOUTC output Buffered analog output voltage of DAC C.
28 VREFN input Negative DAC reference input that defines the zero-scale output voltage, with an allowable range of AVSS to VREFP − 2.5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SSOP-28
Category ADC/DAC/Data Conversion
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Relative Accuracy (INL), A grade INL -1 1 LSB A grade, outputs unloaded, AVDD = +15 V, AVSS = -15 V 3
Differential Nonlinearity (DNL) DNL -1 1 LSB Guaranteed monotonic 3
Zero-Scale Error -2 2 LSB RL = 2 kΩ 3
Full-Scale Error -2 2 LSB RL = 2 kΩ 3
Zero-Scale TC -15 15 15 ppm FSR/°C RL = 2 kΩ 3
Full-Scale TC -20 20 20 ppm FSR/°C RL = 2 kΩ 3
VREFP Input Current IVREFP -2.75 1.5 2.75 mA Typically 1.5 mA 3
VREFN Input Current IVREFN -2.75 -2 0 mA Typically -2 mA 3
Output Current IOUT -5 5 mA RL = 2 kΩ, CL = 100 pF 3
VIH, Input High Voltage VIH 2.4 V TA = 25°C 3
VIL, Input Low Voltage VIL 0.8 V TA = 25°C 3
Digital Input Current 1 µA 3
VOH, Output High Voltage VOH 4 V IOH = 0.4 mA 3
VOL, Output Low Voltage VOL 0.4 V IOL = −1.6 mA 3
Power Supply Sensitivity 30 ppm FSR/V 14.25 V ≤ AVDD ≤ 15.75 V 3
AIDD Supply Current AIDD 2.125 3 mA/channel Outputs unloaded, VREFP = 2.5 V, typically 2.125 mA 3
AISS Supply Current AISS 1.625 2.5 mA/channel Outputs unloaded, typically 1.625 mA 3
Power Dissipation 270 mW 3
Relative Accuracy (INL), A grade, AVSS = -5 V INL -1 1 LSB A grade 4
Relative Accuracy (INL), A grade, AVSS = 0 V INL -2 2 LSB A grade, AVSS = 0 V, single supply operation only 4
Differential Nonlinearity (DNL), +5 V DNL -1 1 LSB Guaranteed monotonic 4
Zero-Scale Error, AVSS = -5 V -5 5 LSB AVSS = -5 V 4
Zero-Scale Error, AVSS = 0 V -10 10 LSB AVSS = 0 V 4
Full-Scale Error, AVSS = -5 V -5 5 LSB AVSS = -5 V 4
Full-Scale Error, AVSS = 0 V -10 10 LSB AVSS = 0 V 4
VREFP Input Current, +5 V IVREFP -0.5 0.5 mA Code 0x0000 4
Output Current, +5 V IOUT -1.25 1.25 mA RL = 2 kΩ, CL = 100 pF 4
AIDD Supply Current, +5 V AIDD 2 mA/channel Outputs unloaded. 4
AISS Supply Current, +5 V AISS 1.5 mA/channel Outputs unloaded, AVSS = -5 V 4
Power Dissipation, AVSS = -5 V 70 mW AVSS = -5 V 4
Power Dissipation, AVSS = 0 V 40 mW AVSS = 0 V 4
Zero-Scale TC, +5 V 100 ppm FSR/°C 4
Full-Scale TC, +5 V 100 ppm FSR/°C 4
Power Supply Sensitivity, +5 V 100 ppm FSR/V 4
Large Signal Bandwidth, +5 V 450 kHz −3 dB, VREFP = 0 V to 2.5 V p-p 4
Output Voltage Settling Time, 10 V step tS 10 µs To 0.01%, 10 V step, RL = 1 kΩ 5
Output Voltage Settling Time, 2.5 V step tS 7 µs To 0.01%, 2.5 V step, RL = 1 kΩ 5
Slew Rate 2.2 V/µs 10% to 90% 5
Analog Crosstalk 72 dB 5
Digital Feedthrough 5 nV-s 5
AVSS to DGND AVSS -16.5 0.3 V Absolute maximum rating, TA = 25°C 8
AVDD to DGND AVDD -0.3 16.5 V Absolute maximum rating, TA = 25°C 8
AVSS to AVDD -33 0.3 V Absolute maximum rating, TA = 25°C 8
VL to DGND VL -0.3 7 V Absolute maximum rating, TA = 25°C 8
Current into Any Pin -15 15 mA Absolute maximum rating 8
Digital Pin Voltage to DGND -0.3 7 V Absolute maximum rating 8
Storage Temperature Range TSTG -65 150 °C Absolute maximum rating 8
Junction Temperature TJ 150 °C TJ max 8
Operating Temperature Range TA -40 85 °C Industrial 8
Thermal Impedance, Junction-to-Ambient θJA 100 °C/W 28-lead SSOP package 8
Thermal Impedance, Junction-to-Case θJC 39 °C/W 28-lead SSOP package 8

CAD (KiCad official)

  • Symbol: AD5725ARSZ-1500RL7
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28 (KiCad packages3D, STEP)
  • 3D model files: ad5725arsz-1500rl7-etched.step / ad5725arsz-1500rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5725arsz-1500rl7.step / ad5725arsz-1500rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 2545781af3caf455, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF