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STM32F103RGT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f103rgt6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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STM32F103RGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F103RGT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup domain power supply for RTC, oscillator, and backup registers when VDD is absent; 1.8 to 3.6 V.
2 PC13-TAMPER-RTC bidirectional GPIO port C pin 13 with RTC tamper input functionality, 5V tolerant.
3 PC14-OSC32_IN bidirectional GPIO port C pin 14, low-speed external oscillator input.
4 PC15-OSC32_OUT bidirectional GPIO port C pin 15, low-speed external oscillator output.
5 OSC_IN input High-speed external oscillator input pin; 4 to 16 MHz crystal or external clock source.
6 OSC_OUT output High-speed external oscillator output pin.
7 NRST input External reset pin with integrated pull-up and filter; VIL(NRST) max 0.8 V, VIH(NRST) min 2 V.
8 PC0 bidirectional GPIO port C pin 0, 5V tolerant; ADC123_IN10 analog input channel.
9 PC1 bidirectional GPIO port C pin 1, 5V tolerant; ADC123_IN11 analog input channel.
10 PC2 bidirectional GPIO port C pin 2, 5V tolerant; ADC123_IN12 analog input channel.
11 PC3 bidirectional GPIO port C pin 3, 5V tolerant; ADC123_IN13 analog input channel.
12 VSSA power_in Analog ground reference, must be connected to VSS.
13 VDDA power_in Analog power supply; 2.4 to 3.6 V when ADC or DAC is used, maximum 300 mV difference from VDD allowed.
14 PA0-WKUP bidirectional GPIO port A pin 0, wake-up input, 5V tolerant; USART2_CTS, ADC123_IN0, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR alternate functions.
15 PA1 bidirectional GPIO port A pin 1, 5V tolerant; USART2_RTS, ADC123_IN1, TIM5_CH2, TIM2_CH2 alternate functions.
16 PA2 bidirectional GPIO port A pin 2, 5V tolerant; USART2_TX, TIM5_CH3, ADC123_IN2, TIM9_CH1, TIM2_CH3 alternate functions.
17 PA3 bidirectional GPIO port A pin 3, 5V tolerant; USART2_RX, TIM5_CH4, ADC123_IN3, TIM2_CH4, TIM9_CH2 alternate functions.
18 VSS_4 power_in Ground connection, must be connected to VSS.
19 VDD_4 power_in Main power supply; 2.0 to 3.6 V with 0.1 µF and 4.7 µF bypass capacitors.
20 PA4 bidirectional GPIO port A pin 4, 5V tolerant; SPI1_NSS, USART2_CK, DAC_OUT1, ADC12_IN4 alternate functions.
21 PA5 bidirectional GPIO port A pin 5, 5V tolerant; SPI1_SCK, DAC_OUT2, ADC12_IN5 alternate functions.
22 PA6 bidirectional GPIO port A pin 6, 5V tolerant; SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM3_CH1, TIM13_CH1 alternate functions.
23 PA7 bidirectional GPIO port A pin 7, 5V tolerant; SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM3_CH2, TIM14_CH1 alternate functions.
24 PC4 bidirectional GPIO port C pin 4, 5V tolerant; ADC12_IN14 analog input channel.
25 PC5 bidirectional GPIO port C pin 5, 5V tolerant; ADC12_IN15 analog input channel.
26 PB0 bidirectional GPIO port B pin 0, 5V tolerant; ADC12_IN8, TIM3_CH3, TIM8_CH2N alternate functions.
27 PB1 bidirectional GPIO port B pin 1, 5V tolerant; ADC12_IN9, TIM3_CH4, TIM8_CH3N alternate functions.
28 PB2/BOOT1 bidirectional GPIO port B pin 2, BOOT1 configuration pin, 5V tolerant; selects boot source when pulled high.
29 PB10 bidirectional GPIO port B pin 10, 5V tolerant; I2C2_SCL, USART3_TX, TIM2_CH3 alternate functions.
30 PB11 bidirectional GPIO port B pin 11, 5V tolerant; I2C2_SDA, USART3_RX, TIM2_CH4 alternate functions.
31 VSS_1 power_in Ground connection, must be connected to VSS.
32 VDD_1 power_in Main power supply; 2.0 to 3.6 V with 0.1 µF bypass capacitor.
33 PB12 bidirectional GPIO port B pin 12, 5V tolerant; SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN alternate functions.
34 PB13 bidirectional GPIO port B pin 13, 5V tolerant; SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N alternate functions.
35 PB14 bidirectional GPIO port B pin 14, 5V tolerant; SPI2_MISO, TIM1_CH2N, USART3_RTS, TIM12_CH1 alternate functions.
36 PB15 bidirectional GPIO port B pin 15, 5V tolerant; SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM12_CH2 alternate functions.
37 PC6 bidirectional GPIO port C pin 6, 5V tolerant; I2S2_MCK, TIM8_CH1, SDIO_D6, TIM3_CH1 alternate functions.
38 PC7 bidirectional GPIO port C pin 7, 5V tolerant; I2S3_MCK, TIM8_CH2, SDIO_D7, TIM3_CH2 alternate functions.
39 PC8 bidirectional GPIO port C pin 8, 5V tolerant; TIM8_CH3, SDIO_D0, TIM3_CH3 alternate functions.
40 PC9 bidirectional GPIO port C pin 9, 5V tolerant; TIM8_CH4, SDIO_D1, TIM3_CH4 alternate functions.
41 PA8 bidirectional GPIO port A pin 8, 5V tolerant; USART1_CK, TIM1_CH1, MCO clock output alternate functions.
42 PA9 bidirectional GPIO port A pin 9, 5V tolerant; USART1_TX, TIM1_CH2 alternate functions.
43 PA10 bidirectional GPIO port A pin 10, 5V tolerant; USART1_RX, TIM1_CH3 alternate functions.
44 PA11 bidirectional GPIO port A pin 11, 5V tolerant; USART1_CTS, USB_DM, CAN_RX, TIM1_CH4 alternate functions.
45 PA12 bidirectional GPIO port A pin 12, 5V tolerant; USART1_RTS, USB_DP, CAN_TX, TIM1_ETR alternate functions.
46 PA13 bidirectional GPIO port A pin 13, 5V tolerant; JTMS-SWDIO serial wire debug input/output for programming and debugging.
47 VSS_2 power_in Ground connection, must be connected to VSS.
48 VDD_2 power_in Main power supply; 2.0 to 3.6 V with 0.1 µF bypass capacitor.
49 PA14 bidirectional GPIO port A pin 14, 5V tolerant; JTCK-SWCLK serial wire debug clock for programming and debugging.
50 PA15 bidirectional GPIO port A pin 15, 5V tolerant; JTDI, SPI3_NSS, I2S3_WS, TIM2_CH1_ETR alternate functions.
51 PC10 bidirectional GPIO port C pin 10, 5V tolerant; UART4_TX, SDIO_D2, USART3_TX alternate functions.
52 PC11 bidirectional GPIO port C pin 11, 5V tolerant; UART4_RX, SDIO_D3, USART3_RX alternate functions.
53 PC12 bidirectional GPIO port C pin 12, 5V tolerant; UART5_TX, SDIO_CK, USART3_CK alternate functions.
54 PD2 bidirectional GPIO port D pin 2, 5V tolerant; TIM3_ETR, UART5_RX, SDIO_CMD alternate functions; FSMC_D2 not available in LQFP64.
55 PB3 bidirectional GPIO port B pin 3, 5V tolerant; JTDO, SPI3_SCK, I2S3_CK, TIM2_CH2, SPI1_SCK alternate functions.
56 PB4 bidirectional GPIO port B pin 4, 5V tolerant; NJTRST, SPI3_MISO, TIM3_CH1, SPI1_MISO alternate functions.
57 PB5 bidirectional GPIO port B pin 5, 5V tolerant; I2C1_SMBA, SPI3_MOSI, I2S3_SD, TIM3_CH2, SPI1_MOSI alternate functions.
58 PB6 bidirectional GPIO port B pin 6, 5V tolerant; I2C1_SCL, TIM4_CH1, USART1_TX alternate functions.
59 PB7 bidirectional GPIO port B pin 7, 5V tolerant; I2C1_SDA, FSMC_NADV, TIM4_CH2, USART1_RX alternate functions.
60 BOOT0 input Boot configuration pin; selects execution from Flash (0) or system memory (1) at reset; internal pull-down.
61 PB8 bidirectional GPIO port B pin 8, 5V tolerant; TIM4_CH3, SDIO_D4, TIM10_CH1, I2C1_SCL, CAN_RX alternate functions.
62 PB9 bidirectional GPIO port B pin 9, 5V tolerant; TIM4_CH4, SDIO_D5, TIM11_CH1, I2C1_SDA, CAN_TX alternate functions.
63 VSS_3 power_in Ground connection, must be connected to VSS.
64 VDD_3 power_in Main power supply; 2.0 to 3.6 V with 0.1 µF bypass capacitor.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F103RGT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f103rgt6-etched.step / stm32f103rgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103rgt6.step / stm32f103rgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (136 pp, sha256 69897f9cf77df3f0, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF