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ATMEGA169PA-AU
Public Made by Adomby adom
Microchip Tech ATMEL & AVR, TQFP-64(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATMEGA169PA-AU
Microchip Tech · ATMEL & AVR · TQFP-64(14x14)
ATMEGA169PA-AU from Microchip Tech, in a TQFP-64(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LCDCAP | passive | An external capacitor (typical > 470 nF) connects here when the LCD module is enabled and uses internal power, acting as the reservoir for VLCD. |
| 2 | PE0 | bidirectional | Port E bit 0, a bi-directional I/O pin with selectable internal pull-up, with alternate functions RXD/PCINT0. |
| 3 | PE1 | bidirectional | Port E bit 1, a bi-directional I/O pin with selectable internal pull-up, with alternate functions TXD/PCINT1. |
| 4 | PE2 | bidirectional | Port E bit 2, a bi-directional I/O pin with selectable internal pull-up, with alternate functions XCK/AIN0/PCINT2. |
| 5 | PE3 | bidirectional | Port E bit 3, a bi-directional I/O pin with selectable internal pull-up, with alternate functions AIN1/PCINT3. |
| 6 | PE4 | bidirectional | Port E bit 4, a bi-directional I/O pin with selectable internal pull-up, with alternate functions USCK/SCL/PCINT4. |
| 7 | PE5 | bidirectional | Port E bit 5, a bi-directional I/O pin with selectable internal pull-up, with alternate functions DI/SDA/PCINT5. |
| 8 | PE6 | bidirectional | Port E bit 6, a bi-directional I/O pin with selectable internal pull-up, with alternate functions DO/PCINT6. |
| 9 | PE7 | bidirectional | Port E bit 7, a bi-directional I/O pin with selectable internal pull-up, with alternate functions CLKO/PCINT7. |
| 10 | PB0 | bidirectional | Port B bit 0, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions SS/PCINT8. |
| 11 | PB1 | bidirectional | Port B bit 1, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions SCK/PCINT9. |
| 12 | PB2 | bidirectional | Port B bit 2, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions MOSI/PCINT10. |
| 13 | PB3 | bidirectional | Port B bit 3, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions MISO/PCINT11. |
| 14 | PB4 | bidirectional | Port B bit 4, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions OC0A/PCINT12. |
| 15 | PB5 | bidirectional | Port B bit 5, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions OC1A/PCINT13. |
| 16 | PB6 | bidirectional | Port B bit 6, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions OC1B/PCINT14. |
| 17 | PB7 | bidirectional | Port B bit 7, a bi-directional I/O pin with selectable internal pull-up and better drive capability than the other ports, with alternate functions OC2A/PCINT15. |
| 18 | PG3 | bidirectional | Port G bit 3, a bi-directional I/O pin with selectable internal pull-up, with alternate functions T1/SEG24. |
| 19 | PG4 | bidirectional | Port G bit 4, a bi-directional I/O pin with selectable internal pull-up, with alternate functions T0/SEG23. |
| 20 | RESET/PG5 | input | Reset input: a low level longer than the minimum pulse length generates a reset even if the clock is not running; also serves as Port G bit 5. |
| 21 | VCC | power_in | Digital supply voltage. |
| 22 | GND | power_in | Ground. |
| 23 | XTAL2 | output | Output from the inverting oscillator amplifier, also TOSC2. |
| 24 | XTAL1 | input | Input to the inverting oscillator amplifier and to the internal clock operating circuit, also TOSC1. |
| 25 | PD0 | bidirectional | Port D bit 0, a bi-directional I/O pin with selectable internal pull-up, with alternate functions ICP1/SEG22. |
| 26 | PD1 | bidirectional | Port D bit 1, a bi-directional I/O pin with selectable internal pull-up, with alternate functions INT0/SEG21. |
| 27 | PD2 | bidirectional | Port D bit 2, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG20. |
| 28 | PD3 | bidirectional | Port D bit 3, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG19. |
| 29 | PD4 | bidirectional | Port D bit 4, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG18. |
| 30 | PD5 | bidirectional | Port D bit 5, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG17. |
| 31 | PD6 | bidirectional | Port D bit 6, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG16. |
| 32 | PD7 | bidirectional | Port D bit 7, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG15. |
| 33 | PG0 | bidirectional | Port G bit 0, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG14. |
| 34 | PG1 | bidirectional | Port G bit 1, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG13. |
| 35 | PC0 | bidirectional | Port C bit 0, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG12. |
| 36 | PC1 | bidirectional | Port C bit 1, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG11. |
| 37 | PC2 | bidirectional | Port C bit 2, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG10. |
| 38 | PC3 | bidirectional | Port C bit 3, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG9. |
| 39 | PC4 | bidirectional | Port C bit 4, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG8. |
| 40 | PC5 | bidirectional | Port C bit 5, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG7. |
| 41 | PC6 | bidirectional | Port C bit 6, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG6. |
| 42 | PC7 | bidirectional | Port C bit 7, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG5. |
| 43 | PG2 | bidirectional | Port G bit 2, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG4. |
| 44 | PA7 | bidirectional | Port A bit 7, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG3. |
| 45 | PA6 | bidirectional | Port A bit 6, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG2. |
| 46 | PA5 | bidirectional | Port A bit 5, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG1. |
| 47 | PA4 | bidirectional | Port A bit 4, a bi-directional I/O pin with selectable internal pull-up, with alternate function SEG0. |
| 48 | PA3 | bidirectional | Port A bit 3, a bi-directional I/O pin with selectable internal pull-up, with alternate function COM3. |
| 49 | PA2 | bidirectional | Port A bit 2, a bi-directional I/O pin with selectable internal pull-up, with alternate function COM2. |
| 50 | PA1 | bidirectional | Port A bit 1, a bi-directional I/O pin with selectable internal pull-up, with alternate function COM1. |
| 51 | PA0 | bidirectional | Port A bit 0, a bi-directional I/O pin with selectable internal pull-up, with alternate function COM0. |
| 52 | VCC | power_in | Digital supply voltage. |
| 53 | GND | power_in | Ground. |
| 54 | PF7 | bidirectional | Port F bit 7, an ADC7 analog input that also serves as an I/O pin and as JTAG TDI, with the pull-up activated when JTAG is enabled even during reset. |
| 55 | PF6 | bidirectional | Port F bit 6, an ADC6 analog input that also serves as an I/O pin and as JTAG TDO. |
| 56 | PF5 | bidirectional | Port F bit 5, an ADC5 analog input that also serves as an I/O pin and as JTAG TMS, with the pull-up activated when JTAG is enabled even during reset. |
| 57 | PF4 | bidirectional | Port F bit 4, an ADC4 analog input that also serves as an I/O pin and as JTAG TCK, with the pull-up activated when JTAG is enabled even during reset. |
| 58 | PF3 | bidirectional | Port F bit 3, an ADC3 analog input that also serves as an I/O pin when the A/D converter is not used. |
| 59 | PF2 | bidirectional | Port F bit 2, an ADC2 analog input that also serves as an I/O pin when the A/D converter is not used. |
| 60 | PF1 | bidirectional | Port F bit 1, an ADC1 analog input that also serves as an I/O pin when the A/D converter is not used. |
| 61 | PF0 | bidirectional | Port F bit 0, an ADC0 analog input that also serves as an I/O pin when the A/D converter is not used. |
| 62 | AREF | input | Analog reference pin for the A/D converter. |
| 63 | GND | power_in | Ground. |
| 64 | AVCC | power_in | Supply voltage pin for Port F and the A/D converter, to be connected externally to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-64(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
ATMEGA169PA-AU - Footprint:
Package_QFP:TQFP-64_14x14mm_P0.8mm - 3D model: TQFP-64(14x14) (KiCad packages3D, STEP)
- 3D model files:
atmega169pa-au-etched.step/atmega169pa-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega169pa-au.step/atmega169pa-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (39 pp, sha256
d4323bf006acd3e2, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).