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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

APM32F030RCT6

Geehy · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

APM32F030RCT6 from Geehy, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Digital supply, 2.0-3.6 V; powers the I/O pins and the internal regulator.
2	PC13	input	Standard I/O powered through the power switch, which sources only 3 mA, so output use is limited to 2 MHz at 30 pF and it must not drive LEDs; alternate functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2.
3	PC14-OSC32_IN	bidirectional	Same power-switch limits as PC13 (3 mA, 2 MHz at 30 pF in output mode); alternate function OSC32_IN for the 32.768 kHz LSE oscillator.
4	PC15-OSC32_OUT	bidirectional	Same power-switch limits as PC13 (3 mA, 2 MHz at 30 pF in output mode); alternate function OSC32_OUT for the 32.768 kHz LSE oscillator.
5	PF0-OSC_IN	bidirectional	Standard I/O with default function I2C1_SDA; alternate function OSC_IN for the 4-32 MHz HSE oscillator.
6	PF1-OSC_OUT	bidirectional	Standard I/O with default function I2C1_SCL; alternate function OSC_OUT for the 4-32 MHz HSE oscillator.
7	NRST	bidirectional	Active-low chip reset input and internal reset output with a permanent pull-up of 25-55 kΩ (40 kΩ typ.).
8	PC0	bidirectional	3.3 V standard I/O connected to ADC; default functions EVENTOUT and USART6_TX, additional function ADC_IN10.
9	PC1	bidirectional	3.3 V standard I/O connected to ADC; default functions EVENTOUT and USART6_RX, additional function ADC_IN11.
10	PC2	bidirectional	3.3 V standard I/O connected to ADC; default functions SPI2_MISO and EVENTOUT, additional function ADC_IN12.
11	PC3	bidirectional	3.3 V standard I/O connected to ADC; default functions SPI2_MOSI and EVENTOUT, additional function ADC_IN13.
12	VSSA	power_in	Analog ground for the ADC, reset block, RC oscillators and PLL.
13	VDDA	power_in	Analog supply for the ADC, reset block, RC oscillators and PLL; must be greater than or equal to VDD and is supplied first, with 2.4-3.6 V when the ADC is used.
14	PA0	bidirectional	3.3 V standard I/O connected to ADC; default functions USART2_CTS and USART4_TX, additional functions ADC_IN0, RTC_TAMP2 and WKUP1.
15	PA1	bidirectional	3.3 V standard I/O connected to ADC; default functions USART2_RTS, EVENTOUT and USART4_RX, additional function ADC_IN1.
16	PA2	bidirectional	3.3 V standard I/O connected to ADC; default functions USART2_TX and TMR15_CH1, additional functions ADC_IN2 and WKUP4.
17	PA3	bidirectional	3.3 V standard I/O connected to ADC; default functions USART2_RX and TMR15_CH2, additional function ADC_IN3.
18	VSS	power_in	Digital ground.
19	VDD	power_in	Digital supply, 2.0-3.6 V; powers the I/O pins and the internal regulator.
20	PA4	bidirectional	3.3 V standard I/O connected to ADC; default functions SPI1_NSS, USART2_CK, TMR14_CH1 and USART6_TX, additional function ADC_IN4.
21	PA5	bidirectional	3.3 V standard I/O connected to ADC; default functions SPI1_SCK and USART6_RX, additional function ADC_IN5.
22	PA6	bidirectional	3.3 V standard I/O connected to ADC; default functions SPI1_MISO, TMR3_CH1, TMR1_BKIN, TMR16_CH1, EVENTOUT and USART3_CTS, additional function ADC_IN6.
23	PA7	bidirectional	3.3 V standard I/O connected to ADC; default functions SPI1_MOSI, TMR3_CH2, TMR14_CH1, TMR1_CH1N, TMR17_CH1 and EVENTOUT, additional function ADC_IN7.
24	PC4	bidirectional	3.3 V standard I/O connected to ADC; default functions EVENTOUT and USART3_TX, additional function ADC_IN14.
25	PC5	bidirectional	Port C general-purpose I/O with alternate function AF1 USART3_RX (Table 6).
26	PB0	bidirectional	Port B general-purpose I/O with alternate functions EVENTOUT (AF0), TMR3_CH3 (AF1), TMR1_CH2N (AF2) and USART3_CK (AF4).
27	PB1	bidirectional	Port B general-purpose I/O with alternate functions TMR14_CH1 (AF0), TMR3_CH4 (AF1), TMR1_CH3N (AF2) and USART3_RTS (AF4).
28	PB2	bidirectional	Port B general-purpose I/O; Table 5 lists no alternate functions for this pin.
29	PB10	bidirectional	Port B general-purpose I/O with alternate functions I2C2_SCL (AF1), USART3_TX (AF4) and SPI2_SCK (AF5).
30	PB11	bidirectional	Port B general-purpose I/O with alternate functions EVENTOUT (AF0), I2C2_SDA (AF1) and USART3_RX (AF4).
31	VSS	power_in	Digital ground.
32	VDD	power_in	Digital supply, 2.0-3.6 V; powers the I/O pins and the internal regulator.
33	PB12	bidirectional	Port B general-purpose I/O with alternate functions SPI2_NSS (AF0), EVENTOUT (AF1), TMR1_BKIN (AF2), USART3_RTS (AF4) and TMR15 (AF5).
34	PB13	bidirectional	Port B general-purpose I/O with alternate functions SPI2_SCK (AF0), TMR1_CH1N (AF2), USART3_CTS (AF4) and I2C2_SCL (AF5).
35	PB14	bidirectional	Port B general-purpose I/O with alternate functions SPI2_MISO (AF0), TMR15_CH1 (AF1), TMR1_CH2N (AF2), USART3_RTS (AF4) and I2C2_SDA (AF5).
36	PB15	bidirectional	Port B general-purpose I/O with alternate functions SPI2_MOSI (AF0), TMR15_CH2 (AF1), TMR1_CH3N (AF2) and TMR15_CH1N (AF3).
37	PC6	bidirectional	Port C general-purpose I/O with alternate function TMR3_CH1 (AF0).
38	PC7	bidirectional	Port C general-purpose I/O with alternate function TMR3_CH2 (AF0).
39	PC8	bidirectional	Port C general-purpose I/O with alternate function TMR3_CH3 (AF0).
40	PC9	bidirectional	5 V-tolerant I/O (5T) with default function TMR3_CH4.
41	PA8	bidirectional	5 V-tolerant I/O (5T) with default functions USART1_CK, TMR1_CH1, EVENTOUT and MCO.
42	PA9	bidirectional	5 V-tolerant I/O (5T) with default functions USART1_TX, TMR1_CH2, TMR15_BKIN and I2C1_SCL.
43	PA10	bidirectional	5 V-tolerant I/O (5T) with default functions USART1_RX, TMR1_CH3, TMR17_BKIN and I2C1_SDA.
44	PA11	bidirectional	5 V-tolerant I/O (5T) with default functions USART1_CTS, TMR1_CH4, EVENTOUT and I2C2_SCL.
45	PA12	bidirectional	5 V-tolerant I/O (5T) with default functions USART1_RTS, TMR1_ETR, EVENTOUT and I2C2_SDA.
46	PA13	bidirectional	5 V-tolerant I/O (5T) that defaults to SWDIO with internal pull-up active after reset; additional function IR_OUT.
47	VSS	power_in	Digital ground.
48	VDD	power_in	Digital supply, 2.0-3.6 V; powers the I/O pins and the internal regulator.
49	PA14	bidirectional	5 V-tolerant I/O (5T) that defaults to SWCLK with internal pull-down active after reset; additional function USART2_TX.
50	PA15	bidirectional	5 V-tolerant I/O (5T) with default functions SPI1_NSS, USART2_RX, USART4_RTS and EVENTOUT.
51	PC10	bidirectional	5 V-tolerant I/O (5T) with default functions USART3_TX and USART4_TX.
52	PC11	bidirectional	5 V-tolerant I/O (5T) with default functions USART3_RX and USART4_RX.
53	PC12	bidirectional	5 V-tolerant I/O (5T) with default functions USART3_CK, USART4_CK and USART5_TX.
54	PD2	bidirectional	5 V-tolerant I/O (5T) with default functions TMR3_ETR, USART3_RTS and USART5_RX.
55	PB3	bidirectional	5 V-tolerant I/O (5T) with default functions SPI1_SCK, EVENTOUT and USART5_TX.
56	PB4	bidirectional	5 V-tolerant I/O (5T) with default functions SPI1_MISO, TMR3_CH1, EVENTOUT, TMR17_BKIN and USART5_RX.
57	PB5	bidirectional	Standard 3.3 V I/O with default functions SPI1_MOSI, I2C1_SMBA, TMR16_BKIN, TMR3_CH2 and USART5_CK_RTS; additional function WKUP6.
58	PB6	bidirectional	5 V-tolerant I/O with FM+ capability (5Tf) and default functions I2C1_SCL, USART1_TX and TMR16_CH1N.
59	PB7	bidirectional	5 V-tolerant I/O with FM+ capability (5Tf) and default functions I2C1_SDA, USART1_RX, TMR17_CH1N and USART4_CTS.
60	BOOT0	input	Dedicated boot-selection pin whose level, sampled at startup, selects main memory, BootLoader or SRAM boot mode.
61	PB8	bidirectional	5 V-tolerant I/O (5T) with default functions I2C1_SCL and TMR16_CH1.
62	PB9	bidirectional	5 V-tolerant I/O (5T) with default functions I2C1_SDA, IR_OUT, SPI2_NSS, TMR17_CH1 and EVENTOUT.
63	VSS	power_in	Digital ground.
64	VDD	power_in	Digital supply, 2.0-3.6 V; powers the I/O pins and the internal regulator.

Key specifications

Parameter	Value
Manufacturer	Geehy
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
内部 AHB 时钟频率	fHCLK			48	MHz		26
内部 APB1 时钟频率	fPCLK1			48	MHz		26

CAD (KiCad official)

Symbol: APM32F030RCT6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: apm32f030rct6-etched.step / apm32f030rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); apm32f030rct6.step / apm32f030rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Geehy datasheet (56 pp, sha256 278f6b9195c24444, retrieved 2026-10-19, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF