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Contents

README

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TPS79850QDGNRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HVSSOP-8

TPS79850QDGNRQ1 from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulated output voltage pin. A small (1μF) capacitor is needed from this pin to ground to provide stability.
2 SENSE/FB input This pin is the input to the control loop error amplifier. Use this pin to set the output voltage of the device.
3 NC unconnected No internal connection.
4 GND power_in Ground. The exposed thermal pad is connected to ground through this pin.
5 EN input Enable pin. Driving the EN pin high turns on the regulator over full operating range. Driving this pin low puts the regulator into shutdown mode over full operating range.
6 NC unconnected No internal connection.
7 NC unconnected No internal connection.
8 IN input Input pin. Place a 0.1μF ceramic or greater capacitor from this pin to ground to provide stability. Both input and output capacitor grounds must be tied back to the device ground with no significant impedance between them.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HVSSOP-8
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: TPS79850QDGNRQ1
  • Footprint: Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm
  • 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • Annotated 3D hero: tps79850qdgnrq1-hero.glb (dashed pad outlines, silkscreen with pin 1, signal names; the adom-hero standard) is what the viewer shows. Downloads and EDA use the clean model, tps79850qdgnrq1-etched.glb.
  • 3D model files: tps79850qdgnrq1-etched.step / tps79850qdgnrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps79850qdgnrq1.step / tps79850qdgnrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 2d0039f5814819ba, retrieved 2026-10-02, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF