component
TPIC74100QPWPRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPIC74100QPWPRQ1
Texas Instruments · DC-DC Converters · HTSSOP-20-EP
TPIC74100QPWPRQ1 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCR1 | input | Programmable slew-rate control input. |
| 2 | Cboot2 | input | External bootstrap capacitor connection. |
| 3 | Cboot1 | input | External bootstrap capacitor connection. |
| 4 | Vdriver | power_in | Input voltage source for the unregulated input supply. |
| 5 | L1 | input | Inductor input; an external Schottky diode to GND must be connected to L1, with a maximum forward drop of 0.4 V at 1 A and 125°C. |
| 6 | PGND | power_in | Power ground. |
| 7 | L2 | input | Inductor output. |
| 8 | VOUT | power_out | 5-V regulated output. |
| 9 | 5Vg | power_out | Switched 5-V supply. |
| 10 | AIN | input | Programmable alarm setting. |
| 11 | CLP | bidirectional | Low-power operation mode, digital input. |
| 12 | RESET | output | Reset function, open-drain output. |
| 13 | AOUT | output | Alarm output, open-drain. |
| 14 | REST | output | Programmable reset timer delay. |
| 15 | Rmod | input | Main switching frequency modulation setting to minimize EMI. |
| 16 | GND | power_in | Ground. |
| 17 | Vlogic | power_out | Supply decoupling output that may be used as a 5-V supply for logic-level inputs. |
| 18 | ENABLE | input | Switch-mode regulator enable/disable input. |
| 19 | 5Vg_ENABLE | input | Switched 5-V voltage regulator output enable/disable input. |
| 20 | SCR0 | input | Programmable slew-rate control input. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Supply Chip |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Unregulated input voltage, V(driver) | V(driver) | -0.5 | 40 | V | 4 | ||
| Unregulated inputs | V(AIN), V(ENABLE) | -0.5 | 40 | V | 4 | ||
| Switch mode voltage | V(L1) | -1 | 40 | V | 4 | ||
| Switch mode voltage | V(L2) | -1 | 7 | V | 4 | ||
| Logic input voltages | V(Rmod), V(SCR0), V(SCR1), V(CLP), V(5Vg_ENABLE) | -0.5 | 7 | V | 4 | ||
| Low output voltages | V(RESET), V(AOUT), V(logic), V(REST) | -0.5 | 7 | V | 4 | ||
| Bootstrap voltage | V(Cboot1) | 52 | V | 4 | |||
| Operating virtual junction temperature range | TJ | -40 | 150 | °C | 4 | ||
| Operating ambient temperature range | TA | -40 | 125 | °C | 4 | ||
| Unregulated input voltage | V(driver) | 6 | 24 | V | 4 | ||
| Unregulated input voltages | V(AIN), V(ENABLE) | 0 | 24 | V | 4 | ||
| Switch-mode pin | V(L1) | -1 | 17 | V | 4 | ||
| Switch-mode pin | V(L2) | 5 | 5.5 | V | 4 | ||
| Logic levels (I/O) | V(Rmod), V(logic), V(SCR0), V(SCR1), V(5Vg_ENABLE), V(RESET), V(AOUT), V(CLP), V(REST) | 0 | 5.25 | V | 4 | ||
| Operating ambient temperature range | TA | -40 | 125 | °C | 4 | ||
| Unregulated input voltage | V(driver) | 1.5 | 40 | V | 5 | ||
| Soft-start ramp | SOM | 4 | 20 | V/ms | CO = 36 μF (min) to 220 μF (max) | 5 | |
| Soft-start ramp | SOM | 2 | 20 | V/ms | CO = 220 μF (min) to 470 μF (max) | 5 | |
| Output-voltage tolerance | VO | -2 | 2 | % | Normal mode | 5 | |
| Output-voltage tolerance | VO | -3 | 3 | % | Boost/buck crossover or low-power mode | 5 | |
| Output current | IO | 1 | A | V(driver) ≥ 7 V | 5 | ||
| Output current, boost mode | IO(Boost) | 200 | mA | V(driver) = 2 V, see Note (2) | 5 | ||
| Output current, boost mode | IO(Boost) | 120 | mA | V(driver) = 1.5 V, see Note (2) | 5 | ||
| Internal peak current limit (normal mode) | IPPn | 1.75 | 2.5 | A | 5 | ||
| Internal peak current limit (low-power mode) | IPPl | 0.75 | 1.25 | A | 5 | ||
| Boost/buck crossover voltage window | V(driver) | 5 | 5.9 | V | See Note (3) | 5 | |
| Thermal shutdown | Tot | 160 | 180 | 200 | °C | 5 | |
| Output voltage | VO | 5 | V | DC | 5 | ||
| Quiescent current | Iq | 100 | 160 | μA | CLP = 0 V, V(driver) = 11 V, IO = 0 mA | 5 | |
| Standby current | I(standby) | 10 | 20 | μA | ENABLE = low | 5 | |
| Peak current | IP | 1.5 | A | V(driver) = 16 V, IO = 1 A, and L = 33 μH | 5 | ||
| On-state resistance | rDS(on) | 135 | 225 | mΩ | 5 | ||
| Output current | IO | 400 | mA | 5 | |||
| 5Vg_ENABLE threshold high voltage | VIH | 2.5 | 3 | 3.5 | V | V(5Vg) = 5 V | 5 |
| 5Vg_ENABLE threshold low voltage | VIL | 1.5 | 2 | 2.5 | V | V(5Vg) = 0 V | 5 |
| Hysteresis voltage | V(hys) | 0.5 | 1 | V | 5 | ||
| Internal pulldown resistor | r(pd) | 300 | 500 | 850 | kΩ | 6 | |
| ENABLE threshold high voltage | VIH | 2.5 | 3 | 3.5 | V | 8 V ≤ V(driver) ≤ 17 V | 6 |
| ENABLE threshold high voltage | VIH | 1.9 | 3 | 3.5 | V | 6 V ≤ V(driver) < 8 V | 6 |
| ENABLE threshold low voltage | VIL | 1.5 | 2 | 2.5 | V | VO = 5 V | 6 |
| Hysteresis voltage | V(hys) | 0.5 | 1 | V | 8 V ≤ V(driver) ≤ 17 V | 6 | |
| RESET threshold voltage | V(th) | 4.51 | 4.65 | 4.79 | V | 6 | |
| RESET tolerance | V(RESET) | -3 | 3 | % | 6 | ||
| RESET time | t(RESET) | 8 | 10 | 12 | ms | C(REST) = 10 nF | 6 |
| RESET time | t(RESET) | 80 | 100 | 120 | ms | C(REST) = 100 nF, see Note (1) | 6 |
| RESET output low voltage | VOL | 450 | mV | Isink = 5 mA | 6 | ||
| RESET output low voltage | VOL | 84 | mV | Isink = 1 mA | 6 | ||
| RESET deglitch time | t(deglitch) | 8 | 10 | 12.5 | μs | See Note(1) | 6 |
| Alarm threshold low voltage | VIL | 2.2 | 2.3 | 2.35 | V | 6 | |
| Alarm threshold high voltage | VIH | 2.43 | 2.5 | 2.58 | V | 6 | |
| Load current in low-power mode | IO(LPM) | 50 | mA | V(driver) < 7 V | 6 | ||
| High-level CLP input threshold voltage | VIH | 2.6 | V | Normal mode | 6 | ||
| Low-level CLP input threshold voltage | VIL | 1.15 | V | Low-power mode | 6 | ||
| Switching frequency | f(sw) | 440 | kHz | V(Rmod) = 0 V, modulator OFF | 6 | ||
| Modulation minimum frequency | f(sw)min | 270 | 330 | 445 | kHz | 6 | |
| Modulation maximum frequency | f(sw)max | 450 | 550 | 680 | kHz | 6 | |
| Operating-frequency accuracy | f(sw)ac | -20 | 20 | % | f(sw) = 440 kHz | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 37.9 | °C/W | PWP 20-pin package | 5 |
CAD (KiCad official)
- Symbol:
TPIC74100QPWPRQ1 - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP (KiCad packages3D, STEP)
- 3D model files:
tpic74100qpwprq1-etched.step/tpic74100qpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpic74100qpwprq1.step/tpic74100qpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
50f73565926b251e, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).