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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM8AF5268TAY

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8AF5268TAY from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	bidirectional	Reset pin whose main function is reset, with a weak pull-up per Table 11; its electrical limits are in Table 39, which is not in the provided pages.
2	PA1/OSCIN	bidirectional	Port A1 I/O (CMOS input, standard speed up to 2 MHz, push-pull or open-drain output) whose default function is the resonator/crystal oscillator input OSCIN.
3	PA2/OSCOUT	bidirectional	Port A2 I/O (CMOS input with external interrupt, standard speed up to 2 MHz) whose default function is the resonator/crystal oscillator output OSCOUT.
4	VSSIO_1	power_in	I/O ground for the first I/O bank.
5	VSS	power_in	Digital ground.
6	VCAP	power_out	1.8 V regulator capacitor pin, to which the external VCAP capacitor is connected.
7	VDD	power_in	Digital power supply.
8	VDDIO_1	power_in	I/O power supply for the first I/O bank.
9	PA3/TIM2_CH3	bidirectional	Port A3 I/O (standard speed up to 2 MHz) whose default alternate function is Timer 2 channel 3, which can be remapped to TIM3_CH1 via option bit AFR1.
10	PA4/USART_RX	bidirectional	Port A4 I/O (fast/slow programmable speed O3) whose default alternate function is USART receive.
11	PA5/USART_TX	bidirectional	Port A5 I/O (fast/slow programmable speed O3) whose default alternate function is USART transmit.
12	PA6/USART_CK	bidirectional	Port A6 I/O (fast/slow programmable speed O3) whose default alternate function is the USART synchronous clock.
13	VDDA	power_in	Analog power supply.
14	VSSA	power_in	Analog ground.
15	PB7/AIN7	bidirectional	Port B7 I/O (standard speed up to 2 MHz) with ADC analog input AIN7.
16	PB6/AIN6	bidirectional	Port B6 I/O (standard speed up to 2 MHz) with ADC analog input AIN6.
17	PB5/AIN5	bidirectional	Port B5 I/O (standard speed up to 2 MHz) with ADC analog input AIN5; alternate function I2C_SDA is available after remap via AFR6.
18	PB4/AIN4	bidirectional	Port B4 I/O (standard speed up to 2 MHz) with ADC analog input AIN4; alternate function I2C_SCL is available after remap via AFR6.
19	PB3/AIN3	bidirectional	Port B3 I/O (standard speed up to 2 MHz) with ADC analog input AIN3; alternate function TIM1_ETR is available after remap via AFR5.
20	PB2/AIN2	bidirectional	Port B2 I/O (standard speed up to 2 MHz) with ADC analog input AIN2; alternate function TIM1_CH3N is available after remap via AFR5.
21	PB1/AIN1	bidirectional	Port B1 I/O (standard speed up to 2 MHz) with ADC analog input AIN1; alternate function TIM1_CH2N is available after remap via AFR5.
22	PB0/AIN0	bidirectional	Port B0 I/O (standard speed up to 2 MHz) with ADC analog input AIN0; alternate function TIM1_CH1N is available after remap via AFR5.
23	PE7/AIN8	bidirectional	Port E7 I/O (standard speed up to 2 MHz) with ADC analog input AIN8.
24	PE6/AIN9	bidirectional	Port E6 I/O (standard speed up to 2 MHz) with ADC analog input AIN9.
25	PE5/SPI_NSS	bidirectional	Port E5 I/O (standard speed up to 2 MHz) whose default alternate function is the SPI master/slave select.
26	PC1/TIM1_CH1	bidirectional	Port C1 high-sink I/O (8 mA, fast/slow programmable speed O3) whose default alternate function is Timer 1 channel 1.
27	PC2/TIM1_CH2	bidirectional	Port C2 high-sink I/O (8 mA, fast/slow programmable speed O3) whose default alternate function is Timer 1 channel 2.
28	PC3/TIM1_CH3	bidirectional	Port C3 high-sink I/O (8 mA, fast/slow programmable speed O3) whose default alternate function is Timer 1 channel 3.
29	PC4/TIM1_CH4	bidirectional	Port C4 high-sink I/O (8 mA, fast/slow programmable speed O3) whose default alternate function is Timer 1 channel 4.
30	PC5/SPI_SCK	bidirectional	Port C5 I/O (fast/slow programmable speed O3) whose default alternate function is the SPI clock.
31	VSSIO_2	power_in	I/O ground for the second I/O bank.
32	VDDIO_2	power_in	I/O power supply for the second I/O bank.
33	PC6/SPI_MOSI	bidirectional	Port C6 I/O (fast/slow programmable speed O3) whose default alternate function is SPI master out / slave in.
34	PC7/SPI_MISO	bidirectional	Port C7 I/O (fast/slow programmable speed O3) whose default alternate function is SPI master in / slave out.
35	PG0/CAN_TX	bidirectional	Port G0 I/O (standard speed up to 2 MHz) whose default alternate function is CAN transmit.
36	PG1/CAN_RX	bidirectional	Port G1 I/O (standard speed up to 2 MHz) whose default alternate function is CAN receive.
37	PE3/TIM1_BKIN	bidirectional	Port E3 I/O (standard speed up to 2 MHz) whose default alternate function is the Timer 1 break input.
38	PE2/I2C_SDA	bidirectional	Port E2 true open-drain I/O (no weak pull-up and no protection diode to VDD) whose default alternate function is the I2C data line.
39	PE1/I2C_SCL	bidirectional	Port E1 true open-drain I/O (no weak pull-up and no protection diode to VDD) whose default alternate function is the I2C clock line.
40	PE0/CLK_CCO	bidirectional	Port E0 I/O (fast/slow programmable speed O3) whose default alternate function is the configurable clock output CLK_CCO.
41	PD0/TIM3_CH2	bidirectional	Port D0 high-sink I/O (8 mA) whose default alternate function is Timer 3 channel 2; after remap it can carry TIM1_BKIN (AFR3) or CLK_CCO (AFR2).
42	PD1/SWIM	bidirectional	Port D1 high-sink I/O (8 mA, fast/slow programmable speed O4) used as the SWIM data interface, held in input pull-up during reset and after reset release.
43	PD2/TIM3_CH1	bidirectional	Port D2 high-sink I/O (8 mA) whose default alternate function is Timer 3 channel 1; after remap it can carry TIM2_CH3 (AFR1).
44	PD3/TIM2_CH2	bidirectional	Port D3 high-sink I/O (8 mA) whose default alternate function is Timer 2 channel 2; after remap it can carry ADC_ETR (AFR0).
45	PD4/TIM2_CH1/BEEP	bidirectional	Port D4 high-sink I/O (8 mA) whose default alternate function is Timer 2 channel 1; after remap it can carry the BEEP output (AFR7).
46	PD5/LINUART_TX	bidirectional	Port D5 I/O (standard speed up to 2 MHz) whose default alternate function is LINUART data transmit.
47	PD6/LINUART_RX	bidirectional	Port D6 I/O (standard speed up to 2 MHz) whose default alternate function is LINUART data receive.
48	PD7/TLI	bidirectional	Port D7 I/O (standard speed up to 2 MHz) whose default alternate function is the top level interrupt TLI; when configured as an interrupt pin it triggers the TLI.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-48(7x7)
Category	Embedded Processors & Controllers
Pins	48

CAD (KiCad official)

Symbol: STM8AF5268TAY
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: stm8af5268tay-etched.step / stm8af5268tay-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm8af5268tay.step / stm8af5268tay.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (125 pp, sha256 3f11cfe069d4bf98, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF