BUF634U from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BW	input	Bandwidth adjust pin; a resistor connected between V- and BW sets the bandwidth from 30MHz to 180MHz.
2	NC	unconnected	No internal connection.
3	VIN	power_in	Signal input of the unity-gain open-loop buffer.
4	V-	power_in	Negative power supply; supply voltage is ±2.25 V to ±18 V, with VS = (V+) - (V-).
5	NC	unconnected	No internal connection.
6	VO	output	Output pin that delivers up to ±250-mA continuous output current, with internal current limit at approximately ±350 mA.
7	V+	power_in	Positive power supply; supply voltage is ±2.25 V to ±18 V, with VS = (V+) - (V-).
8	NC	unconnected	No internal connection.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Amplifiers/Comparators
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input offset voltage	VOS		36	65	mV	TA = 25℃	7
Input offset voltage	VOS		36	65	mV	TA = 25℃	8
Input bias current	IB		0.25	2	µA	VIN = 0 V	7
Input bias current	IB		0.03	0.25	µA	VIN = 0 V	8
Linear input voltage range		-13		13	V	RL = 1 kΩ, IB < 10 µA	7
Linear input voltage range		-13		13	V	RL = 1 kΩ, IB < 10 µA	8
Gain	G	0.95		0.99	V/V	VO = ±10 V, RL = 1 kΩ	7
Gain	G	0.95		0.99	V/V	VO = ±10 V, RL = 1 kΩ	8
Gain	G	0.93		0.95	V/V	VO = ±10 V, RL = 100 Ω	7
Gain	G	0.93		0.95	V/V	VO = ±10 V, RL = 100 Ω	8
Gain	G	0.91		0.93	V/V	VO = ±10 V, RL = 67 Ω	7
Gain	G	0.91		0.93	V/V	VO = ±10 V, RL = 67 Ω	8
Output headroom to supplies		1.6		1.8	V	IO = ±10 mA	7
Output headroom to supplies		1.6		1.8	V	IO = ±10 mA	8
Output headroom to supplies		2		2.2	V	IO = ±100 mA	7
Output headroom to supplies		2		2.2	V	IO = ±100 mA	8
Output headroom to supplies		2.2		2.5	V	IO = ±150 mA	7
Output headroom to supplies		2.2		2.5	V	IO = ±150 mA	8
Current output, continuous	IO	-250		250	mA		7
Current output, continuous	IO	-250		250	mA		8
Short-circuit current	ISC		375	550	mA		7
Short-circuit current	ISC		350	550	mA		8
Operating voltage range	VS	2.25		18	V	VS = ±2.25 V to ±18 V	7
Operating voltage range	VS	2.25		18	V	VS = ±2.25 V to ±18 V	8
Quiescent current	IQ		8.5	12	mA	IO = 0 mA	7
Quiescent current	IQ		1.5	2.3	mA	IO = 0 mA	8
Power-supply rejection ratio	PSRR	64	75		dB	VS = ±2.25 V to ±18 V	7
Power-supply rejection ratio	PSRR	64	80		dB	VS = ±2.25 V to ±18 V	8
Input offset voltage drift			175		µV/℃	TA = -40℃ to 125℃	7
Input offset voltage drift			175		µV/℃	TA = -40℃ to 125℃	8
Slew rate	SR		3750		V/µs	VO = 20-V step, VIN-SR = 4000 V/µs	7
Slew rate	SR		3750		V/µs	VO = 20-V step, VIN-SR = 4000 V/µs	8
Output impedance	ZO		5		Ω	DC, IO = 10 mA	7
Output impedance	ZO		7		Ω	DC, IO = 10 mA	8
Thermal shutdown temperature			180		℃		7
Thermal shutdown temperature			180		℃		8
Supply voltage				18	V		4
Operating temperature		-40		125	°C		4
Junction temperature				150	°C		4
Lead temperature (soldering, 10 s)				300	°C	10 s	4
Storage temperature	Tstg	-55		125	°C		4
Supply voltage	VS	2.25	15	18	V	VS = (V+), (V-)	4
Operating temperature	TA	-40	25	85	°C		4
Junction-to-ambient thermal resistance	RθJA		123		°C/W	D (SOIC) 8 pins	4
Junction-to-case (top) thermal resistance	RθJC(top)		55		°C/W	D (SOIC) 8 pins	4
Junction-to-board thermal resistance	RθJB		68		°C/W	D (SOIC) 8 pins	4
Junction-to-top characterization parameter	ψJT		12		°C/W	D (SOIC) 8 pins	4
Junction-to-board characterization parameter	ψJB		67		°C/W	D (SOIC) 8 pins	4
Electrostatic discharge, HBM	V(ESD)	-2500		2500	V	BUF634U in D (SOIC) package, human-body model per JS-001	4
Electrostatic discharge, CDM	V(ESD)	-1000		1000	V	BUF634U in D (SOIC) package, charged-device model per JESD22-C101	4

CAD (KiCad official)

Symbol: BUF634U
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: buf634u-etched.step / buf634u-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); buf634u.step / buf634u.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (40 pp, sha256 176bed1f5b021018, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

BUF634U

Verified BUF634U

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README