component
PIC16F1508-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC16F1508-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SSOP-20-208mil
PIC16F1508-I from Microchip Tech, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply pin. |
| 2 | RA5 | bidirectional | General purpose I/O (TTL input, CMOS output) that also serves as the external clock input CLKIN in EC mode, Timer1 clock input T1CKI, NCO1 clock source input, and secondary oscillator connection SOSCI. |
| 3 | RA4 | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN3, secondary oscillator connection SOSCO, FOSC/4 CLKOUT output, and Timer1 gate input T1G. |
| 4 | RA3 | input | Input-only general purpose pin with IOC and weak pull-up; when MCLRE is set it is the MCLR Reset input with internal pull-up, and VPP is the high-voltage programming pin. |
| 5 | RC5 | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides PWM1 output, CLC1 output, or CWG1A primary output. |
| 6 | RC4 | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides comparator C2 output, CLC2IN1 input, CLC4 output, or CWG1B complementary output. |
| 7 | RC3 | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN7, comparator negative inputs C1IN3- and C2IN3-, PWM2 output, and CLC2IN0 input. |
| 8 | RC6 | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN8, NCO1 source output, CLC3IN1 input, and SPI slave select input SS (alternate location, selected via APFCON). |
| 9 | RC7/AN9/CLC1IN1/SDO | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN9, CLC1IN1 input, and SPI data output SDO. |
| 10 | RB7/CLC3/TX/CK | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides CLC3 output, EUSART asynchronous transmit TX, or EUSART synchronous clock CK. |
| 11 | RB6/SCL/SCK | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides I2C clock SCL (open-drain output) or SPI clock SCK. |
| 12 | RB5/AN11/CLC4IN0/RX/DT | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN11, CLC4IN0 input, EUSART asynchronous receive RX, or EUSART synchronous data DT. |
| 13 | RB4/AN10/CLC3IN0/SDA/SDI | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN10, CLC3IN0 input, I2C data SDA (open-drain), or SPI data input SDI. |
| 14 | RC2/AN6/C1IN2-/C2IN2- | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN6 and comparator negative inputs C1IN2- and C2IN2-. |
| 15 | RC1 | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN5, comparator negative inputs C1IN1- and C2IN1-, PWM4 output, and NCO1 source output (alternate location, selected via APFCON). |
| 16 | RC0/AN4/CLC2/C2IN+ | bidirectional | General purpose I/O (TTL input, CMOS output) that also provides ADC channel AN4, CLC2 source output, and comparator C2 positive input C2IN+. |
| 17 | RA2 | bidirectional | General purpose I/O with IOC and weak pull-up (Schmitt trigger input, CMOS output) that also provides ADC channel AN2, comparator C1 output, DAC1OUT2 output, Timer0 clock input T0CKI, external interrupt INT, PWM3 output, CLC1 output, and CWG1 fault input CWG1FLT. |
| 18 | RA1 | bidirectional | General purpose I/O with IOC and weak pull-up that also provides ADC channel AN1, ADC positive voltage reference input VREF+, comparator negative inputs C1IN0- and C2IN0-, CLC4 source input, and ICSP programming clock ICSPCLK (also ICD clock ICDCLK). |
| 19 | RA0 | bidirectional | General purpose I/O with IOC and weak pull-up (TTL input, CMOS output) that also provides ADC channel AN0, comparator C1 positive input C1IN+, DAC1OUT1 output, and ICSP programming data ICSPDAT (also ICD data ICDDAT). |
| 20 | VSS | power_in | Ground reference pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-20-208mil |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | -40 | 125 | °C | 308 | |||
| Storage temperature | -65 | 150 | °C | 308 | |||
| Voltage on VDD pin with respect to VSS | VDD | -0.3 | 6.5 | V | PIC16F1508/9, with respect to VSS | 308 | |
| Voltage on MCLR pin with respect to VSS | -0.3 | 9 | V | on MCLR pin | 308 | ||
| Voltage on all other pins with respect to VSS | -0.3 | V | on all other pins; upper limit printed as (VDD + 0.3V) | 308 | |||
| Maximum current on VSS pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 308 | |||
| Maximum current on VSS pin | 85 | mA | +85°C ≤ TA ≤ +125°C | 308 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 308 | |||
| Maximum current on VDD pin | 85 | mA | +85°C ≤ TA ≤ +125°C | 308 | |||
| Current sunk by any standard I/O pin | 50 | mA | 308 | ||||
| Current sourced by any standard I/O pin | 50 | mA | 308 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 308 | ||
| Operating voltage VDDMIN | VDD | 2.3 | V | PIC16F1508/9, FOSC ≤ 16 MHz | 309 | ||
| Operating voltage VDDMIN | VDD | 2.5 | V | PIC16F1508/9, 16 MHz < FOSC ≤ 20 MHz | 309 | ||
| Operating voltage VDDMAX | VDD | 5.5 | V | PIC16F1508/9 | 309 | ||
| Operating ambient temperature TA_MIN | TA | -40 | °C | Industrial temperature | 309 | ||
| Operating ambient temperature TA_MAX | TA | 85 | °C | Industrial temperature | 309 | ||
| Supply Voltage | VDD | 2.3 | 5.5 | V | FOSC ≤ 16 MHz | 311 | |
| Supply Voltage | VDD | 2.5 | 5.5 | V | FOSC ≤ 20 MHz | 311 | |
| RAM Data Retention Voltage | VDR | 1.7 | V | Device in Sleep mode | 311 | ||
| Fixed Voltage Reference Voltage, 1x gain (1.024V nominal) | VFVR | -4 | 4 | % | 1x gain; VDD ≥ 2.5V, -40°C ≤ TA ≤ +85°C | 311 | |
| VDD Rise Rate | SVDD | 0.05 | V/ms | Ensures that the Power-on Reset signal is released properly | 311 | ||
| Supply current IDD, LP oscillator | IDD | 15 | 31 | µA | FOSC = 32 kHz, LP oscillator, -40°C ≤ TA ≤ +85°C, VDD 2.3V | 313 | |
| Supply current IDD, LP oscillator | IDD | 17 | 33 | µA | FOSC = 32 kHz, LP oscillator, -40°C ≤ TA ≤ +85°C, VDD 3.0V | 313 | |
| Supply current IDD, LP oscillator | IDD | 21 | 39 | µA | FOSC = 32 kHz, LP oscillator, -40°C ≤ TA ≤ +85°C, VDD 5.0V | 313 | |
| Supply current IDD, HFINTOSC | IDD | 780 | 1200 | µA | FOSC = 16 MHz, HFINTOSC, VDD 2.3V | 314 | |
| Supply current IDD, HFINTOSC | IDD | 1000 | 1550 | µA | FOSC = 16 MHz, HFINTOSC, VDD 3.0V | 314 | |
| Supply current IDD, HFINTOSC | IDD | 1090 | 1700 | µA | FOSC = 16 MHz, HFINTOSC, VDD 5.0V | 314 | |
| Supply current IDD, HS oscillator | IDD | 1170 | 1800 | µA | FOSC = 20 MHz, HS oscillator, VDD 3.0V | 315 | |
| Supply current IDD, HS oscillator | IDD | 1555 | 2300 | µA | FOSC = 20 MHz, HS oscillator, VDD 5.0V | 315 | |
| Base power-down current IPD, Low-Power Sleep mode | IPD | 0.3 | 4 | µA | WDT, BOR, FVR and SOSC disabled, all peripherals inactive, Low-Power Sleep mode, VDD 3.0V, +85°C | 316 | |
| Base power-down current IPD, Low-Power Sleep mode | IPD | 12 | µA | WDT, BOR, FVR and SOSC disabled, all peripherals inactive, Low-Power Sleep mode, VDD 3.0V, +125°C | 316 | ||
| Base power-down current IPD, Low-Power Sleep mode | IPD | 0.4 | 6 | µA | WDT, BOR, FVR and SOSC disabled, all peripherals inactive, Low-Power Sleep mode, VDD 5.0V, +85°C | 316 | |
| Weak pull-up current | IPUR | 25 | 100 | 200 | µA | VDD = 3.3V, VPIN = VSS | 318 |
| Weak pull-up current | IPUR | 25 | 140 | 300 | µA | VDD = 5.0V, VPIN = VSS | 318 |
| Input Low Voltage, I/O port with TTL buffer | VIL | 0.8 | V | TTL buffer, 4.5V ≤ VDD ≤ 5.5V | 318 | ||
| Input High Voltage, I/O port with TTL buffer | VIH | 2 | V | TTL buffer, 4.5V ≤ VDD ≤ 5.5V | 318 | ||
| Input leakage current, I/O ports, 85°C | IIL | -125 | 5 | 125 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C | 318 |
| Input leakage current, MCLR | IIL | -200 | 50 | 200 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance, 85°C | 318 |
| Output low voltage, I/O ports | VOL | 0.6 | V | IOL = 8 mA, VDD = 5V | 318 | ||
| External CLKIN frequency, ECH mode | FOSC | 20 | MHz | External Clock (ECH), high-power mode | 321 | ||
| Calibrated HFINTOSC frequency tolerance | HFOSC | -2 | 2 | % | VDD = 3.0V, TA = 25°C | 322 | |
| Secondary oscillator input frequency range | FT1 | 32.4 | 32.768 | 33.1 | kHz | Oscillator enabled by setting bit T1OSCEN | 326 |
| MCLR Pulse Width (low) | TMCL | 2 | µs | 325 | |||
| Low-Power Watchdog Timer Time-out Period | TWDTLP | 10 | 16 | 27 | ms | VDD = 3.3V-5V, 1:16 prescaler used | 325 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 325 |
| Brown-out Reset Voltage, BORV = 0 | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 325 |
| Brown-out Reset Hysteresis | VHYST | 0 | 25 | 75 | mV | -40°C ≤ TA ≤ +85°C | 325 |
| Low-Power Brown-out Reset Voltage | VLPBOR | 1.8 | 2.1 | 2.5 | V | LPBOR = 1 | 325 |
| ADC Integral Error | EIL | -1.7 | 1 | 1.7 | LSb | VREF = 3.0V | 328 |
| ADC Reference Voltage | VREF | 1.8 | V | VREF = (VRPOS - VRNEG) | 328 | ||
| Recommended impedance of analog voltage source | ZAIN | 10 | kΩ | 328 | |||
| Comparator Input Offset Voltage | VIOFF | -60 | 7.5 | 60 | mV | CxSP = 1, VICM = VDD/2 | 330 |
| Comparator Mode Change to Output Valid | TMC2OV | 10 | µs | 330 | |||
| Cell Endurance (Flash) | EP | 10 | K E/W | -40°C ≤ TA ≤ +85°C (Note 1: self-write and block erase) | 319 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 319 | |||
| Thermal Resistance Junction to Ambient, 20-pin SSOP | JA | 87.3 | C/W | 20-pin SSOP package | 319 | ||
| Thermal Resistance Junction to Case, 20-pin SSOP | JC | 31.1 | C/W | 20-pin SSOP package | 319 |
CAD (KiCad official)
- Symbol:
PIC16F1508-I - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
pic16f1508-i-etched.step/pic16f1508-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f1508-i.step/pic16f1508-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (401 pp, sha256
e20039190e4bde55, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).