component
TLE2141CDR
Public Made by Adomby adom
Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLE2141CDR
Texas Instruments · Operational Amplifier · SOIC-8
TLE2141CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET N1 | passive | Input offset voltage null pin, used with a potentiometer to VCC− (split supply) or GND (single supply) to reduce input offset voltage, and may be left unconnected if nulling is not needed. |
| 2 | IN− | input | Inverting input; inputs operate between VCC− − 0.3 V and VCC+ − 1.8 V without phase reversal. |
| 3 | IN+ | input | Noninverting input; inputs operate between VCC− − 0.3 V and VCC+ − 1.8 V without phase reversal. |
| 4 | VCC− | power_in | Negative supply (split supply) or ground (single supply); total supply range is 4 V to 44 V. |
| 5 | OFFSET N2 | passive | Input offset voltage null pin, used with a potentiometer to VCC− (split supply) or GND (single supply) to reduce input offset voltage, and may be left unconnected if nulling is not needed. |
| 6 | OUT | output | Amplifier output with swing from VCC− + 0.1 V to VCC+ − 1 V under light load, internally current-limited with 20 mA minimum short-circuit current. |
| 7 | VCC+ | power_in | Positive supply; total supply range is 4 V to 44 V. |
| 8 | NC | unconnected | No internal connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VCC+ | VCC+ | 22 | V | see Note 1 | 5 | ||
| Supply voltage VCC- | VCC- | -22 | V | 5 | |||
| Differential input voltage | VID | -44 | 44 | V | see Note 2 | 5 | |
| Input current (each input) | II | -1 | 1 | mA | 5 | ||
| Output current | IO | -80 | 80 | mA | 5 | ||
| Total current into VCC+ | 80 | mA | 5 | ||||
| Total current out of VCC- | 80 | mA | 5 | ||||
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| Operating free-air temperature, C suffix | TA | 0 | 70 | °C | C suffix | 5 | |
| Lead temperature 1,6 mm from case, 10 s | 260 | °C | D package | 5 | |||
| Supply voltage | VCC± | -22 | 22 | V | C suffix, printed ±2 to ±22 V | 5 | |
| Common-mode input voltage | VIC | 0 | 2.9 | V | VCC = 5 V, C suffix | 5 | |
| Common-mode input voltage | VIC | -15 | 12.9 | V | VCC± = ±15 V, C suffix | 5 | |
| Operating free-air temperature | TA | 0 | 70 | °C | C suffix | 5 | |
| Package thermal impedance, junction to ambient | θJA | 97.1 | °C/W | D package | 5 | ||
| Input offset voltage | VIO | 225 | 1400 | µV | VCC = 5 V, TA = 25°C | 6 | |
| Input offset voltage | VIO | 1700 | µV | VCC = 5 V, full range 0°C to 70°C | 6 | ||
| Input offset current | IIO | 8 | 100 | nA | VCC = 5 V, VO = 2.5 V, VIC = 2.5 V, RS = 50 Ω, 25°C | 6 | |
| Input offset current | IIO | 150 | nA | VCC = 5 V, full range | 6 | ||
| Input bias current | IIB | -0.8 | -2 | µA | VCC = 5 V, 25°C | 6 | |
| Input bias current | IIB | -2.1 | µA | VCC = 5 V, full range | 6 | ||
| High-level output voltage | VOH | 3.9 | 4.1 | V | VCC = 5 V, IOH = −150 µA, 25°C | 6 | |
| High-level output voltage | VOH | 3.8 | 4 | V | VCC = 5 V, IOH = −1.5 mA, 25°C | 6 | |
| High-level output voltage | VOH | 3.2 | 3.7 | V | VCC = 5 V, IOH = −15 mA, 25°C | 6 | |
| Low-level output voltage | VOL | 75 | 125 | mV | VCC = 5 V, IOL = 150 µA, 25°C | 6 | |
| Low-level output voltage | VOL | 150 | 225 | mV | VCC = 5 V, IOL = 1.5 mA, 25°C | 6 | |
| Low-level output voltage | VOL | 1.2 | 1.6 | V | VCC = 5 V, IOL = 15 mA, 25°C | 6 | |
| Large-signal differential voltage amplification | AVD | 50 | 220 | V/mV | VCC = ±2.5 V, RL = 2 kΩ, VO = 1 V to −1.5 V, 25°C | 6 | |
| Common-mode rejection ratio | CMRR | 85 | 118 | dB | VCC = 5 V, VIC = VICRmin, RS = 50 Ω, 25°C | 6 | |
| Supply-voltage rejection ratio | kSVR | 90 | 106 | dB | VCC± = ±2.5 V to ±15 V, RS = 50 Ω, 25°C | 6 | |
| Supply current | ICC | 3.4 | 4.4 | mA | VCC = 5 V, VO = 2.5 V, VIC = 2.5 V, no load, 25°C | 6 | |
| Supply current | ICC | 4.6 | mA | VCC = 5 V, full range | 6 | ||
| Input offset voltage | VIO | 200 | 900 | µV | VCC± = ±15 V, 25°C | 8 | |
| Input offset voltage | VIO | 1300 | µV | VCC± = ±15 V, full range 0°C to 70°C | 8 | ||
| Input offset current | IIO | 7 | 100 | nA | VCC± = ±15 V, VIC = 0, VO = 0, RS = 50 Ω, 25°C | 8 | |
| Input offset current | IIO | 150 | nA | VCC± = ±15 V, full range | 8 | ||
| Input bias current | IIB | -0.7 | -1.5 | µA | VCC± = ±15 V, 25°C | 8 | |
| Input bias current | IIB | -1.6 | µA | VCC± = ±15 V, full range | 8 | ||
| Maximum positive peak output voltage swing | VOM+ | 13.8 | 14.1 | V | IO = −150 µA, 25°C | 8 | |
| Maximum positive peak output voltage swing | VOM+ | 13.7 | 14 | V | IO = −1.5 mA, 25°C | 8 | |
| Maximum positive peak output voltage swing | VOM+ | 13.1 | 13.7 | V | IO = −15 mA, 25°C | 8 | |
| Maximum negative peak output voltage swing | VOM− | -14.7 | -14.9 | V | IO = 150 µA, 25°C | 8 | |
| Maximum negative peak output voltage swing | VOM− | -14.5 | -14.8 | V | IO = 1.5 mA, 25°C | 8 | |
| Maximum negative peak output voltage swing | VOM− | -13.4 | -13.8 | V | IO = 15 mA, 25°C | 8 | |
| Large-signal differential voltage amplification | AVD | 100 | 450 | V/mV | VO = ±10 V, RL = 2 kΩ, 25°C | 8 | |
| Common-mode rejection ratio | CMRR | 85 | 108 | dB | VCC± = ±15 V, VIC = VICRmin, RS = 50 Ω, 25°C | 8 | |
| Supply-voltage rejection ratio | kSVR | 90 | 106 | dB | VCC± = ±2.5 V to ±15 V, RS = 50 Ω, 25°C | 8 | |
| Short-circuit output current | IOS | -50 | -25 | mA | VO = 0, VID = 1 V, 25°C | 8 | |
| Short-circuit output current | IOS | 20 | 31 | mA | VO = 0, VID = −1 V, 25°C | 8 | |
| Supply current | ICC | 3.5 | 4.5 | mA | VCC± = ±15 V, VO = 0, no load, 25°C | 8 | |
| Supply current | ICC | 4.7 | mA | VCC± = ±15 V, no load, full range | 8 | ||
| Positive slew rate | SR+ | 27 | 45 | V/µs | VCC± = ±15 V, AVD = −1, RL = 2 kΩ, CL = 500 pF, 25°C | 9 | |
| Negative slew rate | SR− | 27 | 42 | V/µs | VCC± = ±15 V, AVD = 1, RL = 2 kΩ, CL = 500 pF, 25°C | 9 | |
| Input resistance | ri | 65 | MΩ | VCC± = ±15 V, 25°C | 8 | ||
| Input capacitance | ci | 2.5 | pF | 25°C | 8 | ||
| Temperature coefficient of input offset voltage | αVIO | 1.7 | µV/°C | VCC± = ±15 V, VIC = 0, RS = 50 Ω, full range | 8 | ||
| Gain-bandwidth product | 5.9 | MHz | VCC± = ±15 V, RL = 2 kΩ, CL = 100 pF, f = 100 kHz | 9 | |||
| Equivalent input noise voltage | Vn | 10.5 | nV/√Hz | RS = 20 Ω, f = 1 kHz | 9 |
CAD (KiCad official)
- Symbol:
TLE2141CDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tle2141cdr-etched.step/tle2141cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tle2141cdr.step/tle2141cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (84 pp, sha256
4993c88719fcb987, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).