component
X5163S8Z-2.7
Public Made by Adomby adom
RENESAS Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownX5163S8Z-2.7
RENESAS · Monitors & Reset Circuits · SOIC-8
X5163S8Z-2.7 from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS/WDI | input | Chip select input: HIGH deselects the device (SO high impedance, standby), LOW enables it; a HIGH to LOW transition is required after power-up, and as watchdog input a HIGH to LOW transition restarts the watchdog timer, otherwise RESET/RESET goes active. |
| 2 | SO | tri_state | Push/pull serial data output that shifts data out on the falling edge of SCK and is high impedance when CS is HIGH. |
| 3 | WP | input | Write protect input that works with the nonvolatile WPEN bit to lock the watchdog timer control and memory write protect bits (In-Circuit Programmable ROM mode when LOW with WPEN=1). |
| 4 | VSS | power_in | Ground. |
| 5 | SI | input | Serial data input for all opcodes, byte addresses and memory data, MSB first, latched on the rising edge of SCK. |
| 6 | SCK | input | Serial clock controlling bus timing; rising edge latches opcode, address or data on SI and falling edge changes data on SO (max 2MHz). |
| 7 | RESET | output | Open drain reset output (active LOW on X5163) that goes active when VCC falls below the VTRIP sense level (2.55-2.7V for -2.7) or on watchdog timeout, stays active 200ms after VCC recovers, and is valid from VCC = 1V. |
| 8 | VCC | power_in | Supply voltage, 2.7V to 5.5V for the -2.7 version. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reset Trip Point Voltage X5163-2.7 | VTRIP | 2.55 | 2.63 | 2.7 | V | X5163-2.7, X5165-2.7 | 15 |
| Supply Voltage | VCC | 2.7 | 5.5 | V | 12 | ||
| Operating Temperature (X5163S8Z-2.7) | 0 | 70 | °C | Ordering table, 8 Ld SOIC, 0 to 70 | 2 | ||
| Temperature range (recommended operating conditions) | -40 | 85 | °C | 12 | |||
| Temperature under bias | -65 | 135 | °C | 12 | |||
| Storage temperature | -65 | 150 | °C | 12 | |||
| Voltage on any pin with respect to VSS | -1 | 7 | V | 12 | |||
| D.C. output current | 5 | mA | 12 | ||||
| Lead temperature (soldering, 10s) | 300 | °C | 12 | ||||
| VCC Write Current (Active) | ICC1 | 5 | mA | SCK = VCC x 0.1/VCC x 0.9 @ 2MHz, SO = Open | 12 | ||
| VCC Read Current (Active) | ICC2 | 0.4 | mA | SCK = VCC x 0.1/VCC x 0.9 @ 2MHz, SO = Open | 12 | ||
| VCC Standby Current WDT = OFF | ISB1 | 1 | µA | CS = VCC, VIN = VSS or VCC, VCC = 5.5V | 12 | ||
| VCC Standby Current WDT = ON | ISB2 | 50 | µA | CS = VCC, VIN = VSS or VCC, VCC = 5.5V | 12 | ||
| VCC Standby Current WDT = ON | ISB3 | 20 | µA | CS = VCC, VIN = VSS or VCC, VCC = 3.6V | 12 | ||
| Input Leakage Current | ILI | 0.1 | 10 | µA | VIN = VSS to VCC | 12 | |
| Output Leakage Current | ILO | 0.1 | 10 | µA | VOUT = VSS to VCC | 12 | |
| Input LOW Voltage | VIL | -0.5 | 0.3 | V | max is VCC x 0.3 | 12 | |
| Input HIGH Voltage | VIH | 0.7 | 0.5 | V | min is VCC x 0.7; max is VCC + 0.5 | 12 | |
| Output LOW Voltage | VOL1 | 0.4 | V | VCC > 3.3V, IOL = 2.1mA | 12 | ||
| Output HIGH Voltage | VOH1 | 0.8 | V | VCC > 3.3V, IOH = -1.0mA; min is VCC - 0.8 | 12 | ||
| Output HIGH Voltage | VOH2 | 0.4 | V | 2V < VCC ≤ 3.3V, IOH = -0.4mA; min is VCC - 0.4 | 12 | ||
| Reset Output LOW Voltage | VOLS | 0.4 | V | IOL = 1mA | 12 | ||
| Output Capacitance (SO, RESET, RESET) | COUT | 8 | pF | TA = +25°C, f = 1MHz, VCC = 5V, VOUT = 0V | 12 | ||
| Input Capacitance (SCK, SI, CS, WP) | CIN | 6 | pF | TA = +25°C, f = 1MHz, VCC = 5V, VIN = 0V | 12 | ||
| Clock Frequency | fSCK | 0 | 2 | MHz | 2.7-5.5V | 13 | |
| Cycle Time | tCYC | 500 | ns | 2.7-5.5V | 13 | ||
| CS Lead Time | tLEAD | 250 | ns | 2.7-5.5V | 13 | ||
| CS Lag Time | tLAG | 250 | ns | 2.7-5.5V | 13 | ||
| Clock HIGH Time | tWH | 200 | ns | 2.7-5.5V | 13 | ||
| Clock LOW Time | tWL | 200 | ns | 2.7-5.5V | 13 | ||
| Data Setup Time | tSU | 50 | ns | 2.7-5.5V | 13 | ||
| Data Hold Time | tH | 50 | ns | 2.7-5.5V | 13 | ||
| Input Rise Time | tRI | 100 | ns | 2.7-5.5V | 13 | ||
| Input Fall Time | tFI | 100 | ns | 2.7-5.5V | 13 | ||
| CS Deselect Time | tCS | 500 | ns | 2.7-5.5V | 13 | ||
| Write Cycle Time | tWC | 10 | ms | 2.7-5.5V | 13 | ||
| Output Disable Time | tDIS | 250 | ns | 2.7-5.5V | 14 | ||
| Output Valid from Clock Low | tV | 200 | ns | 2.7-5.5V | 14 | ||
| Output Hold Time | tHO | 0 | ns | 2.7-5.5V | 14 | ||
| Output Rise Time | tRO | 100 | ns | 2.7-5.5V | 14 | ||
| Output Fall Time | tFO | 100 | ns | 2.7-5.5V | 14 | ||
| Power-up Reset Time Out | tPURST | 100 | 200 | 280 | ms | 15 | |
| VCC Detect to Reset/Output | tRPD | 500 | ns | 15 | |||
| VCC Fall Time | tF | 100 | µs | 15 | |||
| VCC Rise Time | tR | 100 | µs | 15 | |||
| Reset Valid VCC | VRVALID | 1 | V | 15 | |||
| VTRIP Hysteresis | VTH | 20 | mV | HIGH to LOW vs. LOW to HIGH VTRIP voltage | 15 | ||
| Watchdog Time Out Period | tWDO | 100 | 200 | 300 | ms | WD1 = 1, WD0 = 0 | 15 |
| Watchdog Time Out Period | tWDO | 450 | 600 | 800 | ms | WD1 = 0, WD0 = 1 | 15 |
| Watchdog Time Out Period | tWDO | 1 | 1.4 | 2 | sec | WD1 = 0, WD0 = 0 | 15 |
| CS Pulse Width to Reset the Watchdog | tCST | 400 | ns | 15 | |||
| Reset Time Out | tRST | 100 | 200 | 300 | ms | 15 |
CAD (KiCad official)
- Symbol:
X5163S8Z-2.7 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
x5163s8z-2-7-etched.step/x5163s8z-2-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);x5163s8z-2-7.step/x5163s8z-2-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (22 pp, sha256
aeeab924f9892e1f, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).