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README

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LTC2875IS8#TRPBF

Analog Devices · CAN Transceivers · SOIC-8

LTC2875IS8#TRPBF from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit data input that is low in the dominant state, with an integrated 500k pull-up to VCC.
2 GND power_in Ground reference for the transceiver.
3 VCC power_in Positive supply, 3V ≤ VCC ≤ 3.6V or 4.5V ≤ VCC ≤ 5.5V, to be bypassed with a 0.1µF ceramic capacitor or larger.
4 RXD output Receiver data output that is low in the dominant state, with an integrated 500k pull-up to VCC.
5 SPLIT output Common-mode stabilization output for optional split termination, tolerant to ±60V and ±25kV ESD; leave open if unused.
6 CANL bidirectional Low-level CAN bus line, tolerant to ±60V and ±25kV ESD.
7 CANH bidirectional High-level CAN bus line, tolerant to ±60V and ±25kV ESD.
8 RS input Shutdown and slew control input: a voltage above VIH_RS enters low-power shutdown, below VIL_RS enables the chip, and a resistor to ground sets the slew rate.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Supply Voltage (3.3V VCC Range) VCC 3 3.3 3.6 V 3.3V VCC Range 3
VCC Supply Voltage (5V VCC Range) VCC 4.5 5 5.5 V 5V VCC Range 3
Supply Current (Recessive) ICC(R) 1 1.8 3 mA 3
Supply Current (Dominant) ICC(D) 25 42 60 mA 3
Supply Current in Shutdown Mode (I-Grade) ICCS 1 5 µA RS = TXD = VCC, RXD Open, T ≤ 85°C 3
Bus Output Voltage (Dominant) CANH VO(D) 2.75 3.6 4.5 V CANH t < tTOTXD, VCC = 5V 3
Bus Output Voltage (Dominant) CANH VO(D) 2.15 2.9 3.3 V CANH t < tTOTXD, VCC = 3.3V 3
Bus Output Voltage (Dominant) CANL VO(D) 0.5 1.4 2.25 V CANL t < tTOTXD, VCC = 5V 3
Bus Output Voltage (Dominant) CANL VO(D) 0.5 0.9 1.65 V CANL t < tTOTXD, VCC = 3.3V 3
Bus Output Voltage (Recessive) VO(R) 2 2.5 3 V VCC = 5V, No Load (Figure 1) 3
Bus Output Voltage (Recessive) VO(R) 1.45 1.95 2.45 V VCC = 3.3V, No Load (Figure 1) 3
Differential Output Voltage (Dominant) VOD(D) 1.5 2.2 3 V RL = 50Ω to 65Ω (Figure 1) 3
Differential Output Voltage (Recessive) VOD(R) -500 0 50 mV No Load (Figure 1) 3
Common Mode Output Voltage (Dominant) VOC(D) 2 2.5 3 V VCC = 5V, (Figure 1) 3
Common Mode Output Voltage (Dominant) VOC(D) 1.45 1.95 2.45 V VCC = 3.3V, (Figure 1) 3
Bus Output Short-Circuit Current (Dominant) CANH IOS(D) -100 -75 -40 mA CANH = 0V 3
Bus Output Short-Circuit Current (Dominant) CANH IOS(D) -100 3 mA CANH -60V ≤ CANH ≤ 60V 3
Bus Output Short-Circuit Current (Dominant) CANL IOS(D) 40 75 100 mA CANL = 5V 3
Bus Output Short-Circuit Current (Dominant) CANL IOS(D) -3 100 mA CANL -60V ≤ CANL ≤ 60V 3
Bus Common Mode Voltage for Data Reception VCM -36 36 V VCC = 5V 3
Bus Common Mode Voltage for Data Reception VCM -25 25 V VCC = 3.3V 3
Bus Input Differential Threshold Voltage (Positive-Going) VTH+ 775 900 mV VCC = 5V, -36V ≤ VCM ≤ 36V 3
Bus Input Differential Threshold Voltage (Negative-Going) VTH- 500 625 mV VCC = 5V, -36V ≤ VCM ≤ 36V 3
Input Resistance (CANH and CANL) RIN 25 40 50 kΩ TXD = VCC; RIN = ∆V/∆I; ∆I = ±20µA 3
Differential Input Resistance RID 50 80 100 kΩ TXD = VCC; RIN = ∆V/∆I; ∆I = ±20µA 3
Input Resistance Matching RIN (CANH) to RIN (CANL) ∆RIN -1 1 % 3
Bus Leakage Current (Power Off) (I-Grade) IL -10 10 µA VCC = 0V, CANH = CANL = 5V, T ≤ 85°C 3
SPLIT Output Voltage (VCC = 5V) VO_SPLIT 1.5 2.5 3.5 V -500µA ≤ I(SPLIT) ≤ 500µA, VCC = 5V 4
SPLIT Output Voltage (VCC = 3.3V) VO_SPLIT 0.9 1.9 2.9 V -500µA ≤ I(SPLIT) ≤ 500µA, VCC = 3.3V 4
SPLIT Short-Circuit Current IOS_SPLIT -3 3 mA -60V ≤ SPLIT ≤ 60V 4
Receiver Output Low Voltage VOL_RXD 0.4 V I(RXD) = 3mA (Sinking) 4
Logic Input Current (TXD) IIN_TXD -20 0 10 µA 0 ≤ TXD ≤ VCC 4
Logic Input Current (RS) IIN_RS -170 0 10 µA 0 ≤ RS ≤ VCC 4
TXD to Bus Dominant Propagation Delay tPTXBD 45 80 130 ns VCC = 3.3V (Figure 2, 3) 5
TXD to Bus Dominant Propagation Delay tPTXBD 45 75 115 ns VCC = 5V (Figure 2, 3) 5
TXD to Bus Recessive Propagation Delay tPTXBR 80 120 170 ns VCC = 3.3V (Figure 2, 3) 5
TXD to Bus Recessive Propagation Delay tPTXBR 60 90 120 ns VCC = 5V (Figure 2, 3) 5
Bus Dominant to RXD Propagation Delay tPBDRX 25 40 65 ns (Figure 2, 3) 5
Bus Recessive to RXD Propagation Delay tPBRRX 25 45 80 ns (Figure 2, 3) 5
TXD to RXD Dominant Propagation Delay tPTXRXD 80 120 180 ns VCC = 3.3V (Figure 2, 3) 5
TXD to RXD Dominant Propagation Delay tPTXRXD 75 115 165 ns VCC = 5V (Figure 2, 3) 5
TXD to RXD Recessive Propagation Delay tPTXRXR 115 165 215 ns VCC = 3.3V (Figure 2, 3) 5
TXD to RXD Recessive Propagation Delay tPTXRXR 95 135 185 ns VCC = 5V (Figure 2, 3) 5
TXD Timeout Time tTOTXD 0.5 2 4 ms (Figure 2, 4) 5
Receiver Output Recessive Bit Time, 2Mbps, Loop Delay Symmetry tBIT(RXD),2M 400 455 550 ns VCC2 = 3.3V (Figure 7) 5
Receiver Output Recessive Bit Time, 2Mbps, Loop Delay Symmetry tBIT(RXD),2M 400 475 550 ns VCC2 = 5V (Figure 7) 5
Receiver Output Recessive Bit Time, 4Mbps tBIT(RXD),4M 200 225 275 ns VCC2 = 5V (Figure 7) 5
RXD Enable from Shutdown tENRX 40 µs (Figure 5) 5
Driver Symmetry (CANH + CANL, 2VO(R)), Dynamic Peak VSYM -500 500 mV RL = 60Ω/Tol. < 1%, CSPLIT = 4.7nF/5%, fTXD = 250kHz (Figure 2) 5
Supply Voltage (VCC) Absolute Maximum VCC -0.3 6 V 2
Logic Input Voltages (TXD, RS) -0.3 6 V 2
Interface I/O Voltage (CANH, CANL, SPLIT) -60 60 V 2
Receiver Output Voltage (RXD) -0.3 V max = VCC + 0.3V 2
Bus Differential Voltage (CANH-CANL) -120 120 V CANH-CANL 2
Storage Temperature Range -65 150 °C 2
Operating Ambient Temperature Range (I-Grade) -40 85 °C LTC2875I 2
Thermal Resistance Junction-to-Ambient (S8) θJA 120 °C/W S8 package 2
Maximum Junction Temperature (S8) TJMAX 150 °C S8 package 2

CAD (KiCad official)

  • Symbol: LTC2875IS8#TRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ltc2875is8-trpbf-etched.step / ltc2875is8-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc2875is8-trpbf.step / ltc2875is8-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 68d09922be0d4854, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF