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UC3844AN-TUDI
Public Made by Adomby adom
Tudi AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUC3844AN-TUDI
Tudi · AC-DC Controllers And Regulators · DIP-8
UC3844AN-TUDI from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error Amplifier output, made for loop compensation. |
| 2 | VFB | input | Inverting input of the Error Amplifier, normally connected to the switching power supply output through a resistor divider (analog input range -0.3 to 5.5 V). |
| 3 | ISENSE | input | Input for a voltage proportional to inductor current, which the PWM uses to terminate output switch conduction (analog input range -0.3 to 5.5 V). |
| 4 | RT/CT | passive | Oscillator frequency and maximum output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground. |
| 5 | GND | power_in | Combined control circuitry and power ground. |
| 6 | OUT | output | Directly drives the gate of a power MOSFET, with peak currents up to 1 A sourced and sunk (absolute maximum output current ±1 A). |
| 7 | VCC | power_in | Positive supply of the integrated circuit, absolute maximum 30 V. |
| 8 | VREF | power_out | Reference output that provides charging current for capacitor CT through resistor RT; 5.0 V typical. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | DIP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Output Voltage | VREF | 4.9 | 5 | 5.1 | V | TJ = 25°C, IREF = 1 mA | 3 |
| Line Regulation | ΔVREF | 6 | 20 | mV | 12V ≤ VCC ≤ 25 V | 3 | |
| Load Regulation | ΔVREF | 6 | 25 | mV | 1 mA ≤ IREF ≤ 20mA, TA = 25°C | 3 | |
| Short Circuit Output Current | ISC | -100 | -180 | mA | 3 | ||
| Oscillation Frequency | f | 47 | 52 | 57 | KHz | TJ = 25°C | 3 |
| Frequency Change with Voltage | Δf/ΔVCC | 0.05 | 1 | % | 12V ≤ VCC ≤ 25 V | 3 | |
| Oscillator Amplitude (peak to peak) | V(OSC) | 1.6 | V | 3 | |||
| Error Amp Input Bias Current | IBIAS | -0.1 | -2 | µA | VFB = 3V | 3 | |
| Error Amp Input Voltage | VI(E.A) | 2.42 | 2.5 | 2.58 | V | Vpin1 = 2.5V | 3 |
| Open Loop Voltage Gain | AVOL | 65 | 90 | dB | 2V ≤ V0 ≤ 4V | 3 | |
| Unity Gain Bandwidth | UGBW | 0.5 | 0.6 | MHz | Tj = 25°C, Note 3 | 3 | |
| Power Supply Rejection Ratio | PSRR | 60 | 70 | dB | 12V ≤ VCC ≤ 25 V | 3 | |
| Output Sink Current | ISINK | 2 | 7 | mA | Vpin2 = 2.7V, Vpin1 = 1.1V | 3 | |
| Output Source Current | ISOURCE | -0.5 | -1 | mA | Vpin2 = 2.3V, Vpin1 = 5V | 3 | |
| High Output Voltage | VOH | 5 | V | Vpin2 = 2.3V, RL = 15KΩ to GND | 3 | ||
| High Output Voltage | VOH | 6 | V | Vpin2 = 2.7V, RL = 15KΩ to PIN 8 | 3 | ||
| Low Output Voltage | VOL | 0.8 | 1.1 | V | 3 | ||
| Current Sense Gain | GV | 2.85 | 3 | 3.15 | V/V | Note 1 & 2 | 3 |
| Maximum Input Signal | VI(MAX) | 0.9 | 1 | 1.1 | V | Vpin1 = 5V (Note 1) | 3 |
| Supply Voltage Rejection | SVR | 70 | dB | 12V ≤ VCC ≤ 25 V (Note 1) | 3 | ||
| Current Sense Input Bias Current | IBIAS | -3 | -10 | µA | Vpin3 = 3V | 3 | |
| Low Output Voltage (20 mA sink) | VOL | 0.08 | 0.4 | V | ISINK = 20 mA | 3 | |
| Low Output Voltage (200 mA sink) | VOL | 1.4 | 2.2 | V | ISINK = 200 mA | 3 | |
| High Output Voltage (20 mA sink) | VOH | 13 | 13.5 | V | ISINK = 20 mA | 3 | |
| High Output Voltage (200 mA sink) | VOH | 12 | 13 | V | ISINK = 200 mA | 3 | |
| Rise Time | tR | 45 | 150 | nS | TJ = 25°C, CL = 1nF (Note 3) | 3 | |
| Fall Time | tF | 35 | 150 | nS | TJ = 25°C, CL = 1nF (Note 3) | 3 | |
| Start Threshold | VTH(ST) | 14.5 | 16 | 17.5 | V | 3 | |
| Min. Operating Voltage (After Turn On) | VOPR(min) | 8.5 | 10 | 11.5 | V | After Turn On | 3 |
| Max. Duty Cycle | D(MAX) | 47 | 48 | 50 | % | 3 | |
| Min. Duty Cycle | D(MIN) | 0 | % | 3 | |||
| Start-Up Current | IST | 0.17 | 0.3 | mA | 3 | ||
| Operating Supply Current | ICC(OPR) | 13 | 17 | mA | Vpin3 = Vpin2 = 0V | 3 | |
| Zener Voltage | VZ | 30 | 38 | V | ICC = 25 mA | 3 | |
| Supply Voltage (low impedance source) | VCC | 30 | V | Low impedance source | 2 | ||
| Output Current | IO | -1 | 1 | A | 2 | ||
| Input Voltage (Analog Inputs pins 2,3) | VI | -0.3 | 5.5 | V | Analog inputs pins 2, 3 | 2 | |
| Error Amp Output Sink Current | ISINK(E.A) | 10 | mA | 2 | |||
| Power Dissipation | PD | 1 | W | TA = 25°C | 2 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| Lead Temperature (soldering 5 sec) | TL | 260 | °C | Soldering 5 sec | 2 | ||
| Ambient Operating Temperature Range | TA | 0 | 70 | °C | Electrical characteristics test range (TA = 0°C to +70°C) | 3 |
CAD (KiCad official)
- Symbol:
UC3844AN-TUDI - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
uc3844an-tudi-etched.step/uc3844an-tudi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc3844an-tudi.step/uc3844an-tudi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (11 pp, sha256
c398bd9771df4e2a, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).