Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

74LVC1G126QW5-7

Diodes Incorporated · Buffers, Drivers, Receivers, Transceivers · SOT-25

74LVC1G126QW5-7 from Diodes Incorporated, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable is active HIGH, and when OE is held LOW the output Y enters the high-impedance (Z) state; the device operates from VCC 1.65 V to 5.5 V.
2 A input Data input whose inputs are tolerant to 5.5 V, with VI specified from 0 V to 5.5 V, and unused inputs should be held at VCC or ground.
3 GND power_in Ground reference pin for the device.
4 Y tri_state Data output that is high-impedance when OE is LOW, with rated continuous output current of ±50 mA and IOH/IOL up to -32 mA/32 mA at VCC = 4.5 V.
5 VCC power_in Supply voltage with recommended operating range of 1.65 V to 5.5 V and absolute maximum range of -0.5 V to 6.5 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-25
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Voltage VCC 1.65 5.5 V Operating 3
Data Retention Voltage VCC 1.5 V Data Retention Only 3
High-Level Input Voltage VIH 1.7 V VCC = 2.3V to 2.7V 3
High-Level Input Voltage VIH 2 V VCC = 3V to 3.6V 3
Low-Level Input Voltage VIL 0.7 V VCC = 2.3V to 2.7V 3
Low-Level Input Voltage VIL 0.8 V VCC = 3V to 3.6V 3
Input Voltage VI 0 5.5 V 3
Output Voltage VO 0 V 3
High-Level Output Current IOH -4 mA VCC = 1.65V 3
High-Level Output Current IOH -8 mA VCC = 2.3V 3
High-Level Output Current IOH -12 mA VCC = 2.7V 3
High-Level Output Current IOH -16 mA VCC = 3V 3
High-Level Output Current IOH -32 mA VCC = 4.5V 3
Low-Level Output Current IOL 4 mA VCC = 1.65V 3
Low-Level Output Current IOL 8 mA VCC = 2.3V 3
Low-Level Output Current IOL 12 mA VCC = 2.7V 3
Low-Level Output Current IOL 16 mA VCC = 3V 3
Low-Level Output Current IOL 32 mA VCC = 4.5V 3
Input Transition Rise or Fall Rate Δt/ΔV 20 ns/V VCC = 1.8V ± 0.15V, 2.5V ± 0.2V 3
Input Transition Rise or Fall Rate Δt/ΔV 10 ns/V VCC = 3.3V ± 0.3V 3
Input Transition Rise or Fall Rate Δt/ΔV 5 ns/V VCC = 5V ± 0.5V 3
Operating Free-Air Temperature TA -40 125 °C 3
Supply Voltage Range VCC -0.5 6.5 V 2
Input Voltage Range VI -0.5 6.5 V 2
Voltage Applied to Output in High Impedance or IOFF State VO -0.5 6.5 V High impedance or IOFF state 2
Voltage Applied to Output in High or Low State VO -0.5 V High or low state; printed max VCC + 0.5 2
Input Clamp Current IIK -50 mA VI < 0 2
Output Clamp Current IOK -50 mA 2
Continuous Output Current IO -50 50 mA 2
Continuous Current Through VCC or GND ICC, IGN -100 100 mA 2
Operating Junction Temperature TJ -40 150 °C 2
Storage Temperature TSTG -65 150 °C 2
Thermal Resistance Junction-to-Ambient (SOT25) θJA 184 °C/W Note 7: FR-4 PCB, 2oz copper, minimum recommended pad layout 4
Thermal Resistance Junction-to-Case (SOT25) θJC 62 °C/W Note 7: FR-4 PCB, 2oz copper, minimum recommended pad layout 4
High Level Output Voltage VOH 0.95 V VI = VIH or VIL; IOH = -4mA; VCC 1.65V 4
High Level Output Voltage VOH 1.7 V VI = VIH or VIL; IOH = -8mA; VCC 2.3V 4
High Level Output Voltage VOH 1.9 V VI = VIH or VIL; IOH = -12mA; VCC 2.7V 4
High Level Output Voltage VOH 2 V VI = VIH or VIL; IOH = -24mA; VCC 3V 4
High Level Output Voltage VOH 3.4 V VI = VIH or VIL; IOH = -32mA; VCC 4.5V 4
Low Level Output Voltage VOL 0.1 V VI = VIH or VIL; IOL = 100μA; VCC 1.65V to 5.5V 4
Low Level Output Voltage VOL 0.7 V VI = VIH or VIL; IOL = 4mA; VCC 1.65V 4
Low Level Output Voltage VOL 0.45 V VI = VIH or VIL; IOL = 8mA; VCC 2.3V 4
Low Level Output Voltage VOL 0.6 V VI = VIH or VIL; IOL = 12mA; VCC 2.7V 4
Low Level Output Voltage VOL 0.8 V VI = VIH or VIL; IOL = 24mA; VCC 3V 4
Input Current II -1 1 μA VI = 5.5V or GND; VCC 0 to 5.5V 4
Power Down Leakage Current IOFF -2 2 μA VI or VO = 5.5V; VCC 0V 4
Z-State Leakage Current IOZ -2 2 μA VO = Ground to 5.5V; VCC 3.6V 4
Supply Current ICC 0.1 4 μA VI = 5.5V or GND; IO = 0; VCC 5.5V 4
Additional Supply Current ΔICC 500 μA One input at VCC, 0.6V; other inputs at VCC or GND; VCC 3V to 5.5V 4
Propagation Delay A to Y tPD 1 3 10.5 ns VCC = 1.8V ± 0.15V 5
Propagation Delay A to Y tPD 0.5 2.1 7 ns VCC = 2.5V ± 0.2V 5
Propagation Delay A to Y tPD 0.5 2.3 7 ns VCC = 2.7V 5
Propagation Delay A to Y tPD 0.5 2 6 ns VCC = 3.3V ± 0.3V 5
Propagation Delay A to Y tPD 0.5 1.7 5.5 ns VCC = 5.0V ± 0.5V 5
Enable Time OE to Y tEN 1 3.2 12 ns VCC = 1.8V ± 0.15V 5
Enable Time OE to Y tEN 0.5 2.2 8.5 ns VCC = 2.5V ± 0.2V 5
Enable Time OE to Y tEN 0.5 2.4 8.5 ns VCC = 2.7V 5
Enable Time OE to Y tEN 0.5 2.1 7 ns VCC = 3.3V ± 0.3V 5
Enable Time OE to Y tEN 0.5 1.6 6.5 ns VCC = 5.0V ± 0.5V 5
Disable Time OE to Y tDIS 1 4.3 12 ns VCC = 1.8V ± 0.15V 5
Disable Time OE to Y tDIS 0.5 2.7 7 ns VCC = 2.5V ± 0.2V 5
Disable Time OE to Y tDIS 0.5 3.4 7 ns VCC = 2.7V 5
Disable Time OE to Y tDIS 0.5 3 7 ns VCC = 3.3V ± 0.3V 5
Disable Time OE to Y tDIS 0.5 2.2 5.5 ns VCC = 5.0V ± 0.5V 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 • Weight: 0.0158 grams (Approximate) 9

CAD (KiCad official)

  • Symbol: 74LVC1G126QW5-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-25 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g126qw5-7-etched.step / 74lvc1g126qw5-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g126qw5-7.step / 74lvc1g126qw5-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (10 pp, sha256 82f1cfb58d131602, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF