component
SN65ELT20DR
Public Made by Adomby adom
Texas Instruments Translators, Level Shifters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN65ELT20DR
Texas Instruments · Translators, Level Shifters · SOIC-8
SN65ELT20DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Labeled NC (no connect) in the D-8 top-view pinout assignment; the datasheet gives no function for this pin. |
| 2 | Q | output | One of the complementary PECL outputs; the characterization test condition terminates each output through 50 Ω to VCC − 2 V. |
| 3 | Q̄ | output | The complementary PECL output (printed as Q with an overbar in the pinout); the characterization test condition terminates each output through 50 Ω to VCC − 2 V. |
| 4 | NC | unconnected | Labeled NC (no connect) in the D-8 top-view pinout assignment; the datasheet gives no function for this pin. |
| 5 | GND | power_in | Ground reference; the device operates with GND = 0 V. |
| 6 | NC | unconnected | Labeled NC (no connect) in the D-8 top-view pinout assignment; the datasheet gives no function for this pin. |
| 7 | D | input | TTL input; VIH minimum is 2 V and VIL maximum is 0.8 V, with input voltage not to exceed VCC and an absolute maximum of 6 V. |
| 8 | VCC | power_in | Positive supply; recommended operating range is 4.2 V to 5.7 V with GND = 0 V, and the absolute maximum PECL-mode supply is 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Logic |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN65ELT20DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65elt20dr-etched.step/sn65elt20dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65elt20dr.step/sn65elt20dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
4e46d50cb11a1542, retrieved 2026-10-07, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).