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README

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MAX17634CATP+T

Analog Devices Inc Maxim Integrated · DC-DC Converters · TQFN-20(4x4)

MAX17634CATP+T from Analog Devices Inc Maxim Integrated, in a TQFN-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGND power_in Power ground pin of the converter that must be connected externally to the power ground plane.
2 IN power_in Power-supply input pin with a 4.5V to 36V input supply range, to be decoupled to PGND with a minimum of 4.7µF placed close to the IN and PGND pins.
3 IN power_in Power-supply input pin with a 4.5V to 36V input supply range, to be decoupled to PGND with a minimum of 4.7µF placed close to the IN and PGND pins.
4 EN/UVLO input Enable/undervoltage-lockout pin that enables the output when driven above VENR, disables the device when pulled below VENF, and sets the turn-on input voltage through a resistor divider between IN and SGND.
5 RESET output Open-drain reset output that is driven low when FB drops below 92% of its set value and goes high 1024 cycles after FB rises above 95% of its set value.
6 INTVCC power_out 5V LDO output that must be bypassed to SGND with a 2.2µF ceramic capacitor, and the LDO does not support external loading.
7 SGND power_in Analog ground pin of the device, which the exposed pad must be connected to.
8 SS passive Soft-start input where a capacitor connected from SS to SGND sets the soft-start time.
9 FB input Feedback input that connects to VOUT for the MAX17634A and MAX17634B, or to the center of an external resistor divider from the output to SGND for the MAX17634C.
10 RT input Programmable switching-frequency input where a resistor from RT to SGND sets the frequency between 400kHz and 2.2MHz, and leaving RT open selects the default 500kHz.
11 MODE/SYNC input Mode-selection pin that selects PWM operation when connected to SGND, DCM when connected to INTVCC, and PFM when left open, and that can also accept an external clock for synchronization.
12 EXTVCC power_in External power supply input that reduces internal LDO loss and should be connected to the buck output only when programmed to 5V, otherwise connected to SGND.
13 NC unconnected No connection.
14 IN power_in Power-supply input pin with a 4.5V to 36V input supply range, to be decoupled to PGND with a minimum of 4.7µF placed close to the IN and PGND pins.
15 PGND power_in Power ground pin of the converter that must be connected externally to the power ground plane.
16 NC unconnected No connection.
17 LX output Switching node pin that connects to the switching side of the inductor.
18 LX output Switching node pin that connects to the switching side of the inductor.
19 LX output Switching node pin that connects to the switching side of the inductor.
20 BST passive Boost flying capacitor pin where a 0.1µF ceramic capacitor is connected between BST and LX.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package TQFN-20(4x4)
Category Power Management (PMIC)
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
IN to PGND -0.3 40 V 2
EXTVCC to SGND -5.5 6.5 V 2
BST to PGND -0.3 46.5 V 2
BST to LX -0.3 6.5 V 2
BST to INTVCC -0.3 40 V 2
FB to SGND (MAX17634C) -0.3 6.5 V 2
SS, MODE/SYNC, RESET, INTVCC, RT to SGND -0.3 6.5 V 2
PGND to SGND -0.3 0.3 V 2
LX Total RMS Current -4.7 4.7 A 2
Operating Temperature Range -40 125 °C 2
Junction Temperature -40 150 °C 2
Input Voltage Range VIN 4.5 36 V 3
Input Shutdown Current IIN-SH 2.8 4.5 μA VEN/UVLO = 0V (Shutdown mode) 3
Input Quiescent Current, DCM Mode IQ_DCM 1.2 1.8 mA DCM Mode, VLX = 0.1V 3
EN Threshold rising VENR 1.19 1.215 1.26 V VEN/UVLO rising 3
EN Threshold falling VENF 1.068 1.09 1.131 V VEN/UVLO falling 3
EN Input Leakage Current IEN -50 0 50 nA VEN/UVLO = 0V, TA = +25°C 3
INTVCC Output Voltage Range VINTVCC 4.75 5 5.25 V 1mA ≤ IINTVCC ≤ 25mA 3
INTVCC Current Limit IINTVCC-MAX 30 mA VINTVCC = 4.5V, VIN = 7.5V 3
INTVCC Dropout VINTVCC-DO 0.3 V VIN = 4.5V, IINTVCC = 10mA 3
INTVCC UVLO rising VINTVCC_UVR 4.05 4.2 4.3 V VINTVCC rising 3
INTVCC UVLO falling VINTVCC_UVF 3.65 3.8 3.9 V VINTVCC falling 3
EXTVCC Switchover Threshold rising VEXTVCC 4.56 4.7 4.84 V VEXTVCC rising 3
EXTVCC Switchover Threshold falling VEXTVCC 4.3 4.43 4.6 V VEXTVCC falling 3
High-Side nMOS On-Resistance RDS-ONH 60 115 mΩ ILX = 0.3A, sourcing 3
Low-Side nMOS On-Resistance RDS-ONL 37 73 mΩ ILX = 0.3A, sinking 3
LX Leakage Current ILX_LKG -2 3 μA VLX = (VPGND+1) V to (VIN -1) V, TA = +25°C 3
Soft-Start Charging Current ISS 4.7 5 5.3 μA 3
FB Regulation Voltage (MAX17634C) VFB-REG 0.888 0.9 0.912 V MODE/SYNC = SGND or MODE/SYNC = INTVCC, for MAX17634C 4
FB Regulation Voltage (MAX17634C) VFB-REG 0.889 0.915 0.938 V MODE/SYNC = OPEN, for MAX17634C 4
FB Input Bias Current (MAX17634C) IFB -50 50 nA For MAX17634C, TA = +25°C 4
MODE Threshold PWM VM-PWM 0.75 V MODE/SYNC = SGND (PWM mode) 4
SYNC Frequency Capture Range FSYNC 1.1 1.4 x fSW fSW set by RRT 4
SYNC Pulse Width 50 ns 4
SYNC Threshold VIH VIH 2.1 V 4
SYNC Threshold VIL VIL 0.8 V 4
Peak Current-Limit Threshold IPEAK-LIMIT 5.7 6.7 7.7 A 4
Runaway Current-Limit Threshold IRUNAWAY-LIMIT 6.7 7.8 9 A 4
Valley Current-Limit Threshold IVALLEY-LIMIT -0.28 0 0.28 A MODE/SYNC = OPEN or MODE/SYNC = INTVCC 4
Valley Current-Limit Threshold IVALLEY-LIMIT 2.5 A MODE/SYNC = SGND 4
Switching Frequency fSW 380 400 420 kHz RRT = 50.8kΩ 5
Switching Frequency fSW 475 500 525 kHz RRT = 40.2kΩ 5
Switching Frequency fSW 460 500 540 kHz RRT = OPEN 5
Switching Frequency fSW 1950 2200 2450 kHz RRT = 8.06kΩ 5
VFB Undervoltage Trip Level to Cause Hiccup (MAX17634C) VFB-HICF 0.55 0.58 0.605 V For MAX17634C 5
Minimum On-Time tON-MIN 52 80 ns 5
Minimum Off-Time tOFF-MIN 140 160 ns 5
RESET Output Level Low VRESETL 400 mV IRESET = 10mA 5
RESET Output Leakage Current IRESETLKG -100 100 nA TA = TJ = 25°C, VRESET = 5.5V 5
FB Threshold for RESET Deassertion VFB-OKR 93.8 95 97.8 % VFB Rising, % of VFB-REG 5
FB Threshold for RESET Assertion VFB-OKF 90.5 92 94.6 % VFB Falling, % of VFB-REG 5
Input Quiescent Current, PFM Mode IQ_PFM 96 μA MODE/SYNC = OPEN, VEXTVCC = 5V 3
Input Quiescent Current, PFM Mode (RT = 40.2kΩ) IQ_PFM 106 μA RT = 40.2kΩ, MODE/SYNC = OPEN, VEXTVCC = 5V 3
Input Quiescent Current, PWM Mode IQ_PWM 11 mA Normal switching mode; VEXTVCC = 5V 3
PFM Current-Limit Threshold IPFM 1.6 A MODE/SYNC = OPEN 3
Thermal Shutdown Threshold 165 °C Temperature rising 5
Junction to Ambient (θJA) θJA 26 °C/W Four-layer board, no airflow 2
Junction to Case (θJC) θJC 2 °C/W 2

CAD (KiCad official)

  • Symbol: MAX17634CATP+T
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: TQFN-20(4x4) (KiCad packages3D, STEP)
  • 3D model files: max17634catp-t-etched.step / max17634catp-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max17634catp-t.step / max17634catp-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (22 pp, sha256 77bf297752a23d9c, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF