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TPS7A3901DSCT
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Texas Instruments Linear Voltage Regulators (LDO), WSON-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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README
markdownTPS7A3901DSCT
Texas Instruments · Linear Voltage Regulators (LDO) · WSON-10-EP(3x3)
TPS7A3901DSCT from Texas Instruments, in a WSON-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INP | power_in | Positive input supply (3.3V to 33V); requires a 10µF or larger capacitor to ground placed as close to the pin as possible for stability. |
| 2 | EN | input | Enable pin: logic high (VEN ≥ VIH(EN)) enables the device and logic low (VEN ≤ VIL(EN)) disables it; tie to INP if unused and VEN must not exceed VINP. |
| 3 | NR/SS | passive | Noise-reduction and soft-start pin; a capacitor of 10nF or larger to GND reduces reference noise and enables soft start and startup tracking, and it can also be driven externally as a reference. |
| 4 | GND | power_in | Ground pin; must be connected to ground through a low-impedance path and to the thermal pad. |
| 5 | INN | power_in | Negative input supply (-3.3V to -33V); requires a 10µF or larger capacitor to ground placed as close to the pin as possible for stability. |
| 6 | OUTN | power_out | Negative output; requires a 10µF or larger capacitor to ground placed as close to the pin as possible for stability. |
| 7 | FBN | input | Negative output feedback pin that sets the negative output voltage, regulated to VFBN; an optional 10nF feedforward capacitor goes from OUTN to FBN and the pin must never be grounded. |
| 8 | BUF | output | Buffered reference output connected through R2N to FBN for the negative feedback network; it can drive external circuits with a maximum load of 1mA. |
| 9 | FBP | input | Positive output feedback pin that sets the positive output voltage, regulated to VFBP; an optional 10nF feedforward capacitor goes from OUTP to FBP and the pin must not be directly grounded. |
| 10 | OUTP | power_out | Positive output; requires a 10µF or larger capacitor to ground placed as close to the pin as possible for stability. |
| 11 | Thermal Pad | passive | Thermal pad, internally connected to GND; connect to a large ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(3x3) |
| Category | Power Supply Chip |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage magnitude, either regulator | /VINx/ | 3.3 | 33 | V | 6 | ||
| Enable voltage | VEN | 0 | V | max = VINP | 6 | ||
| Positive output voltage range | VOUTP | 30 | V | min = VFBP | 6 | ||
| Negative output voltage range | VOUTN | -30 | V | max = VFBN | 6 | ||
| Output current, either regulator | IOUTx | 0.005 | 150 | mA | min load needed when no feedback resistors used | 6 | |
| BUF pin output current | IBUF | 0 | 120 | 1000 | µA | 6 | |
| Input capacitor | CINx | 4.7 | 10 | µF | 6 | ||
| Output capacitor | COUTx | 4.7 | 10 | µF | 6 | ||
| Noise-reduction/soft-start capacitor | CNR/SS | 0 | 10 | 1000 | nF | at least 4.7 nF needed for startup tracking | 6 |
| Positive feed-forward capacitor | CFFP | 0 | 10 | 100 | nF | VOUTP to FBP | 6 |
| Negative feed-forward capacitor | CFFN | 0 | 10 | 100 | nF | VOUTN to FBN | 6 |
| Lower positive feedback resistor | R2P | 10 | 240 | kΩ | 6 | ||
| Lower negative feedback resistor | R2N | 10 | 240 | kΩ | FBN to BUF | 6 | |
| Operating junction temperature | TJ | -40 | 125 | °C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 44.4 | °C/W | DSC (WSON) 10-pin | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 33.7 | °C/W | 6 | |||
| Junction-to-board thermal resistance | RθJB | 19.4 | °C/W | 6 | |||
| Junction-to-top characterization parameter | ψJT | 0.4 | °C/W | 6 | |||
| Junction-to-board characterization parameter | ψJB | 19.5 | °C/W | 6 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 2.9 | °C/W | 6 | |||
| Input voltage range, positive channel | VINP | 3.3 | 33 | V | 7 | ||
| Input voltage range, negative channel | VINN | -33 | -3.3 | V | 7 | ||
| UVLO threshold, positive channel | VUVLOP(rising) | 1.4 | 3.1 | V | VINP rising, VINN = -3.3V | 7 | |
| UVLO hysteresis, positive channel | VUVLOP(hys) | 120 | mV | VINP falling, VINN = -3.3V | 7 | ||
| UVLO threshold, negative channel | VUVLON(falling) | -3.1 | -1.4 | V | VINN falling, VINP = 3.3V | 7 | |
| UVLO hysteresis, negative channel | VUVLON(hys) | 70 | mV | VINN rising, VINP = 3.3V | 7 | ||
| Internal reference voltage | VNR/SS | 1.172 | 1.19 | 1.208 | V | 7 | |
| Positive feedback voltage | VFBP | 1.17 | 1.188 | 1.206 | V | 7 | |
| Negative feedback voltage | VFBN | -10 | 3.7 | 10 | mV | 7 | |
| VOUTP accuracy | VOUTP | -1.5 | 1.5 | %VOUT | VINP(nom) ≤ VINP ≤ 33V, 1mA ≤ IOUTP ≤ 150mA, 1.2V ≤ VOUTP(nom) ≤ 30V | 7 | |
| VOUTN accuracy | VOUTN | -3 | 3 | %VOUT | -33V ≤ VINN ≤ VINN(nom), -150mA ≤ IOUTN ≤ -1mA, -30V ≤ VOUTN(nom) ≤ -1.2V | 7 | |
| Negative VOUT channel accuracy, VOUTN(nom) between -1.2V and 0V | VOUTN | -36 | 36 | mV | -33V ≤ VINN ≤ VINN(nom), -150mA ≤ IOUTN ≤ 1mA, -1.2 V < VOUTN(nom) < 0V | 7 | |
| Negative VOUT channel accuracy, VOUTN(nom) = 0V | VOUTN | -12 | 12 | mV | -33V ≤ VINN ≤ VINN(nom), -150mA ≤ IOUTN ≤ 1mA, VOUTN(nom) = 0V | 7 | |
| Line regulation, positive channel | ΔVOUT(ΔVIN)/VOUT(NOM) | 0.035 | %VOUT | VINP(nom) ≤ VINP ≤ 33V | 7 | ||
| Line regulation, negative channel | ΔVOUT(ΔVIN)/VOUT(NOM) | 0.125 | %VOUT | -33V ≤ VINN ≤ VOUT(nom) + 1V | 7 | ||
| Load regulation, positive channel | ΔVOUT(ΔIOUT)/VOUT(NOM) | -0.09 | %VOUT | 1mA ≤ IOUTP ≤ 150mA | 7 | ||
| Load regulation, negative channel | ΔVOUT(ΔIOUT)/VOUT(NOM) | 0.715 | %VOUT | -150mA ≤ IOUTN ≤ -1mA | 7 | ||
| Dropout voltage, positive, 50mA | VDO | 175 | 300 | mV | IOUTP = 50mA, 3.3V ≤ VINP(nom) ≤ 33.0V, VFBP = 1.070V | 7 | |
| Dropout voltage, positive, 150mA | VDO | 300 | 500 | mV | IOUTP = 150mA, 3.3V ≤ VINP(nom) ≤ 33.0V, VFBP = 1.070V | 7 | |
| Dropout voltage, negative, -50mA | VDO | -250 | -145 | mV | IOUTN = -50mA, -3.3V ≤ VINN(nom) ≤ -33.0V, VFBN = 0.0695V | 7 | |
| Dropout voltage, negative, -150mA | VDO | -400 | -275 | mV | IOUTN = -150mA, -3.3V ≤ VINN(nom) ≤ -33.0V, VFBN = 0.0695V | 7 | |
| Buffered reference load regulation | VBUF/IBUF | 1 | mV/mA | IBUF = 100µA to 1mA | 7 | ||
| Output buffer offset voltage | VBUF, VNR/SS | -4 | 3 | 8 | mV | VNR/SS = 0.25V to 1.2V | 7 |
| DC output voltage difference at forced REF | VOUTP-VOUTN | -10 | 10 | %VNR/SS | VNR/SS = 0.25V to 1.2V | 7 | |
| Current limit, positive channel | ILIM | 200 | 330 | 500 | mA | VOUTP = 90% VOUTP(nom) | 7 |
| Current limit, negative channel | ILIM | -500 | -300 | -200 | mA | VOUTN = 90% VOUTN(nom) | 7 |
| Supply current, positive, no load | ISUPPLY | 75 | 150 | µA | IOUTP = 0mA, R2N = open, VINP = 33V | 7 | |
| Supply current, positive, 150mA | ISUPPLY | 904 | µA | IOUTP = 150mA, R2N = open, VINP = 33V | 7 | ||
| Supply current, negative, no load | ISUPPLY | -150 | -60 | µA | IOUTN = 0mA, VOUTN(nom)= 0V, R2N = open, VINN = -33V | 7 | |
| Supply current, negative, 150mA | ISUPPLY | -1053 | µA | IOUTN = 150mA, R2N = open, VINN = -33V | 7 | ||
| Shutdown supply current, positive | ISHDN | 3.75 | 6.5 | µA | VEN = 0.4V, VINP = 33V | 8 | |
| Shutdown supply current, negative | ISHDN | -4.5 | -2.25 | µA | VEN = 0.4V, VINN = -33V | 8 | |
| Feedback pin leakage current, positive | IFBx | 5.5 | 100 | nA | 9 | ||
| Feedback pin leakage current, negative | IFBx | -100 | -9.7 | nA | 9 | ||
| Soft-start charging current | INR/SS | 3 | 5.1 | 6.7 | µA | VNR/SS = 0.9V | 9 |
| Enable pin leakage current | IEN | 0.02 | 1 | µA | VEN = VINP = 33V | 9 | |
| Enable high-level voltage | VIH(EN) | 2.2 | V | max = VINP | 9 | ||
| Enable low-level voltage | VIL(EN) | 0 | 0.4 | V | 9 | ||
| Power-supply rejection ratio | PSRR | 69 | dB | /VIN/ = 6V, /VOUT(nom)/ = 5V, COUT = 10μF, CNR/SS = CFF= 10nF, f = 120Hz | 9 | ||
| Output noise voltage, positive, VINP = 3.3V | Vn | 20.63 | µVRMS | VINP = 3.3V, VOUTP(nom) = VNR/SS, COUTP = 10μF, CNR/SS = 10nF, BW = 10Hz to 100kHz | 9 | ||
| Output noise voltage, positive, VINP = 6V | Vn | 26.86 | µVRMS | VINP = 6V, VOUTP(nom) = 5V, COUTP = 10μF, CNR/SS = CFF = 10nF, BW = 10Hz to 100kHz | 9 | ||
| Output noise voltage, negative, VINN = -3V | Vn | 22.13 | µVRMS | VINN = -3V, VOUTN(nom) = -VNR/SS, COUTP = 10μF, CNR/SS = 10nF, BW = 10Hz to 100kHz | 9 | ||
| Output noise voltage, negative, VINN = -6V | Vn | 28.68 | µVRMS | VINN = -6V, VOUTN(nom) = -5V, COUTP = 10μF, CNR/SS = CFF = 10nF, BW = 10Hz to 100kHz | 9 | ||
| Bandgap to NR pin filter resistor | RNR/SS | 350 | kΩ | 9 | |||
| Thermal shutdown temperature, shutdown | Tsd | 175 | °C | temperature increasing | 9 | ||
| Thermal shutdown temperature, reset | Tsd | 160 | °C | temperature decreasing | 9 | ||
| Delay from EN low-to-high to 2.5% VOUTP | tEN(delay) | 300 | µs | VOUTP = 2.5%×VOUTP(nom) | 9 | ||
| Delay from EN low-to-high to both outputs at 95% | tstart-up | 1.1 | ms | VOUTP = VOUTP(nom) × 95%, VOUTN = VOUTN(nom) × 95% | 9 | ||
| Delay from VOUTP to VOUTN leaving high impedance | tPstart-Nstart | -40 | -17 | 40 | µs | VOUTP = VOUTP(nom) × 2.5% to VOUTN = VOUTN(nom) × 2.5% | 9 |
| Voltage difference between positive and negative outputs | Δ/VOUTP, VOUTN/ | 75 | 300 | mV | during tPstart-Nstart | 9 |
CAD (KiCad official)
- Symbol:
TPS7A3901DSCT - Footprint:
Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm - 3D model: WSON-10-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps7a3901dsct-etched.step/tps7a3901dsct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a3901dsct.step/tps7a3901dsct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (54 pp, sha256
ed6adf7cb68e7992, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).