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CD4052BNSR
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Texas Instruments Analog Switches, Multiplexers, SO-16-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4052BNSR
Texas Instruments · Analog Switches, Multiplexers · SO-16-208mil
CD4052BNSR from Texas Instruments, in a SO-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y CH 0 | bidirectional | Channel Y0 analog in/out switch terminal; analog signals up to 20 VP-P are passed to Y COM when addressed by A and B and not disabled by INH. |
| 2 | Y CH 2 | bidirectional | Channel Y2 analog in/out switch terminal; analog signals up to 20 VP-P are passed to Y COM when addressed by A and B and not disabled by INH. |
| 3 | Y COM | bidirectional | Y common analog out/in terminal that connects to whichever Y channel is selected by the address inputs. |
| 4 | Y CH 3 | bidirectional | Channel Y3 analog in/out switch terminal; analog signals up to 20 VP-P are passed to Y COM when addressed by A and B and not disabled by INH. |
| 5 | Y CH 1 | bidirectional | Channel Y1 analog in/out switch terminal; analog signals up to 20 VP-P are passed to Y COM when addressed by A and B and not disabled by INH. |
| 6 | INH | input | Disables all channels; see Table 8-1 for the input states (Table 8-1 is not included in the supplied pages). |
| 7 | VEE | power_in | Negative power input; the analog signal range is set by VDD - VEE, up to 20 VP-P with VDD - VEE = 20 V. |
| 8 | VSS | power_in | Ground reference terminal; all voltages are referenced to VSS, and the absolute maximum supply voltage V+ to V- is 20 V referenced to VSS. |
| 9 | B | input | Channel select B input that, together with A, selects the active channel; see Table 8-1. |
| 10 | A | input | Channel select A input that, together with B, selects the active channel; see Table 8-1. |
| 11 | X CH 3 | bidirectional | Channel X3 analog in/out switch terminal; analog signals up to 20 VP-P are passed to X COM when addressed by A and B and not disabled by INH. |
| 12 | X CH 0 | bidirectional | Channel X0 analog in/out switch terminal; analog signals up to 20 VP-P are passed to X COM when addressed by A and B and not disabled by INH. |
| 13 | X COM | bidirectional | X common analog in/out terminal that connects to whichever X channel is selected by the address inputs. |
| 14 | X CH 1 | bidirectional | Channel X1 analog in/out switch terminal; analog signals up to 20 VP-P are passed to X COM when addressed by A and B and not disabled by INH. |
| 15 | X CH 2 | bidirectional | Channel X2 analog in/out switch terminal; analog signals up to 20 VP-P are passed to X COM when addressed by A and B and not disabled by INH. |
| 16 | VDD | power_in | Positive power input; digital control supply range is 3 V to 20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-16-208mil |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Quiescent Device Current, IDD Max, VDD 5 V | IDD | 60 | µA | VDD = 5 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 5 V | IDD | 17 | 60 | µA | VDD = 5 V, VSS = VEE = 0 V, 25°C | 6 | |
| Quiescent Device Current, IDD Max, VDD 5 V | IDD | 150 | µA | VDD = 5 V, VSS = VEE = 0 V, 85°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 10 V | IDD | 60 | µA | VDD = 10 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 10 V | IDD | 18 | 60 | µA | VDD = 10 V, VSS = VEE = 0 V, 25°C | 6 | |
| Quiescent Device Current, IDD Max, VDD 10 V | IDD | 300 | µA | VDD = 10 V, VSS = VEE = 0 V, 85°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 15 V | IDD | 60 | µA | VDD = 15 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 15 V | IDD | 18 | 60 | µA | VDD = 15 V, VSS = VEE = 0 V, 25°C | 6 | |
| Quiescent Device Current, IDD Max, VDD 15 V | IDD | 600 | µA | VDD = 15 V, VSS = VEE = 0 V, 85°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 20 V | IDD | 100 | µA | VDD = 20 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Quiescent Device Current, IDD Max, VDD 20 V | IDD | 18 | 100 | µA | VDD = 20 V, VSS = VEE = 0 V, 25°C | 6 | |
| Quiescent Device Current, IDD Max, VDD 20 V | IDD | 3000 | µA | VDD = 20 V, VSS = VEE = 0 V, 85°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 5 V | rON | 800 | Ω | 0 ≤ VIS ≤ VDD; VDD = 5 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 5 V | rON | 850 | Ω | 0 ≤ VIS ≤ VDD; VDD = 5 V, VSS = VEE = 0 V, -40°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 5 V | rON | 470 | 1050 | Ω | 0 ≤ VIS ≤ VDD; VDD = 5 V, VSS = VEE = 0 V, 25°C | 6 | |
| Drain to Source ON Resistance, rON Max, VDD 5 V | rON | 1200 | Ω | 0 ≤ VIS ≤ VDD; VDD = 5 V, VSS = VEE = 0 V, 85°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 5 V | rON | 1300 | Ω | 0 ≤ VIS ≤ VDD; VDD = 5 V, VSS = VEE = 0 V, 125°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 10 V | rON | 310 | Ω | 0 ≤ VIS ≤ VDD; VDD = 10 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 10 V | rON | 300 | Ω | 0 ≤ VIS ≤ VDD; VDD = 10 V, VSS = VEE = 0 V, -40°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 10 V | rON | 180 | 400 | Ω | 0 ≤ VIS ≤ VDD; VDD = 10 V, VSS = VEE = 0 V, 25°C | 6 | |
| Drain to Source ON Resistance, rON Max, VDD 10 V | rON | 520 | Ω | 0 ≤ VIS ≤ VDD; VDD = 10 V, VSS = VEE = 0 V, 85°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 10 V | rON | 550 | Ω | 0 ≤ VIS ≤ VDD; VDD = 10 V, VSS = VEE = 0 V, 125°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 15 V | rON | 200 | Ω | 0 ≤ VIS ≤ VDD; VDD = 15 V, VSS = VEE = 0 V, -55°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 15 V | rON | 210 | Ω | 0 ≤ VIS ≤ VDD; VDD = 15 V, VSS = VEE = 0 V, -40°C | 6 | ||
| Drain to Source ON Resistance, rON Max, VDD 15 V | rON | 125 | 240 | Ω | 0 ≤ VIS ≤ VDD; VDD = 15 V, VSS = VEE = 0 V, 25°C | 6 | |
| Drain to Source ON Resistance, rON Max, VDD 15 V | rON | 300 | Ω | 0 ≤ VIS ≤ VDD; VDD = 15 V, VSS = VEE = 0 V, 85°C | 6 | ||
| OFF Channel Leakage Current: Any Channel OFF (Max) or ALL Channels OFF (COMMON OUT/IN) (Max) | -100 | 100 | nA | VDD = 18 V, VSS = VEE = 0 V, -55°C | 7 | ||
| OFF Channel Leakage Current: Any Channel OFF (Max) or ALL Channels OFF (COMMON OUT/IN) (Max) | -100 | 0.3 | 100 | nA | VDD = 18 V, VSS = VEE = 0 V, 25°C | 7 | |
| OFF Channel Leakage Current: Any Channel OFF (Max) or ALL Channels OFF (COMMON OUT/IN) (Max) | -1000 | 1000 | nA | VDD = 18 V, VSS = VEE = 0 V, 85°C | 7 | ||
| ON Channel Leakage Current: Any Channel ON (Max) or ALL Channels ON (COMMON OUT/IN) (Max) | -800 | 800 | nA | VIS = 5 or 0 V, VEE = -5 V, VSS = 0 V, VDD = 10.5 V, 85°C | 7 | ||
| Input Capacitance, CIN (Any Address or Inhibit Input) | CIN | 5 | 7.5 | pF | VEE = -5 V, VSS = 0 V, VDD = 5 V, 25°C | 8 | |
| Input current, IIN (Max) | IIN | -1 | 0.6 | 1 | µA | VIN = 0, VDD = 18 V, 25°C | 8 |
| Input current, IIN (Max) | IIN | -1 | 1 | µA | VIN = 0, VDD = 18 V, 125°C | 8 | |
| Input Low Voltage, VIL, Max | VIL | 0.8 | V | VDD = 5 V, 25°C | 7 | ||
| Input High Voltage, VIH, Min | VIH | 3.5 | V | VDD = 5 V, 25°C | 8 | ||
| Input High Voltage, VIH, Min | VIH | 7 | V | VDD = 10 V, 25°C | 8 | ||
| Input High Voltage, VIH, Min | VIH | 11 | V | VDD = 15 V, 25°C | 8 | ||
| Supply Voltage V+ to V-, Voltages Referenced to VSS Terminal | -0.5 | 20 | V | Referenced to VSS terminal | 5 | ||
| DC Input Voltage | -0.5 | V | Referenced to VSS; maximum printed as VDD+0.5 V | 5 | |||
| DC Input Current, Any One Input | -10 | 10 | mA | Any one input | 5 | ||
| Maximum junction temperature, plastic package | TJMAX2 | 150 | °C | Plastic package | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Temperature Range | -55 | 125 | °C | Over operating free-air temperature range | 5 | ||
| Junction-to-ambient thermal resistance, RθJA | RθJA | 64 | °C/W | NS (SOP) 16 pins | 5 |
CAD (KiCad official)
- Symbol:
CD4052BNSR - Footprint:
Adom_Gen:Texas_Instruments_CD4052 - 3D model: SO-16-208mil (KiCad packages3D, STEP)
- 3D model files:
cd4052bnsr-etched.step/cd4052bnsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4052bnsr.step/cd4052bnsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
4095fe4b7102bdfc, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).