component
TPS76801QPWP
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS76801QPWP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20-EP
TPS76801QPWP from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 2 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 3 | GND | power_in | Regulator ground. |
| 4 | NC | unconnected | No connect; no internal connection. |
| 5 | EN | input | Enable input; VEN of 1.7 V or higher enables the regulator and 0.9 V or lower shuts it down, with shutdown reducing quiescent current to less than 1 µA at TJ = 25°C. |
| 6 | IN | power_in | Input voltage; recommended range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. |
| 7 | IN | power_in | Input voltage; recommended range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. |
| 8 | NC | unconnected | No connect; no internal connection. |
| 9 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 10 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 11 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 12 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 13 | OUT | power_out | Regulated output voltage; the TPS76801 adjusts from 1.2 V to 5.5 V with output current up to 1.0 A. |
| 14 | OUT | power_out | Regulated output voltage; the TPS76801 adjusts from 1.2 V to 5.5 V with output current up to 1.0 A. |
| 15 | FB/NC | input | Feedback input that senses the output through an external resistor divider on the adjustable device (Vref = 1.1834 V typ, FB pin current 2 nA at VFB = 1.5 V); absolute maximum on OUT and FB is 7 V. |
| 16 | PG | output | Open-drain power-good output that goes low when VO falls to 92-98% of its nominal value, requires an external pullup, and needs at least 1.1 V on IN for valid operation (absolute maximum 16.5 V). |
| 17 | NC | unconnected | No connect; no internal connection. |
| 18 | NC | unconnected | No connect; no internal connection. |
| 19 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 20 | GND/HSINK | power_in | Regulator ground and heatsink connection for the PWP package. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS76801QPWP - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps76801qpwp-etched.step/tps76801qpwp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76801qpwp.step/tps76801qpwp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
742896d0a1cf7766, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).