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SI8651BB-B-IS1

Public Made by Adom

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SKYWORKS SOLUTIONS INC. Global Sourcing Parts, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SI8651BB-B-IS1

SKYWORKS SOLUTIONS INC. · Global Sourcing Parts · SOIC-16

SI8651BB-B-IS1 from SKYWORKS SOLUTIONS INC., in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Side 1 power supply, which must be bypassed with a 0.1 μF capacitor between VDD1 and GND1 placed as close to the package as possible.
2 A1 input Side 1 digital input; all device versions have Schmitt trigger inputs.
3 A2 input Side 1 digital input; all device versions have Schmitt trigger inputs.
4 A3 input Side 1 digital input; all device versions have Schmitt trigger inputs.
5 A4 bidirectional Side 1 digital input or output with a nominal output impedance of approximately 50 Ω ±40%.
6 A5 bidirectional Side 1 digital input or output with a nominal output impedance of approximately 50 Ω ±40%.
7 EN1 input Side 1 active high enable; when disabled (EN = 0) the output pin is driven to a high-impedance state.
8 GND1 power_in Side 1 ground.
9 GND2 power_in Side 2 ground.
10 EN2 input Side 2 active high enable; when disabled (EN = 0) the output pin is driven to a high-impedance state.
11 B5 bidirectional Side 2 digital input or output with a nominal output impedance of approximately 50 Ω ±40%.
12 B4 bidirectional Side 2 digital input or output with a nominal output impedance of approximately 50 Ω ±40%.
13 B3 output Side 2 digital output; the default output state when unpowered is set by the ordering option (default high or low).
14 B2 output Side 2 digital output; the default output state when unpowered is set by the ordering option (default high or low).
15 B1 output Side 2 digital output; the default output state when unpowered is set by the ordering option (default high or low).
16 VDD2 power_in Side 2 power supply, which must be bypassed with a 0.1 μF capacitor between VDD2 and GND2 placed as close to the package as possible.

Key specifications

Parameter Value
Manufacturer SKYWORKS SOLUTIONS INC.
Package SOIC-16
Category Global Sourcing Parts
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Operating Temperature TA -40 25 125 °C 12
Supply Voltage VDD1 VDD1 2.375 5.5 V 12
Supply Voltage VDD2 VDD2 2.375 5.5 V 12
Junction Operating Temperature TJ 150 °C 12
Storage Temperature TSTG -65 150 °C 25
Ambient Temperature Under Bias TA -40 125 °C 25
Junction Temperature TJ 150 °C 25
Supply Voltage VDD1, VDD2 -0.5 7 V 25
Input Voltage VI -0.5 V 25
Output Voltage VO -0.5 V 25
Output Current Drive Channel IO 10 mA All devices unless otherwise stated 25
Latchup Immunity 100 V/ns Slew rate across GND1 and GND2 25
Lead Solder Temperature 260 °C 10 s 25
Maximum Isolation (Input to Output) NB SOIC-16 4500 VRMS 1 sec 25
Case Temperature (VDE 0884-10 safety limiting value) TS 150 °C 23
Safety Input, Output, or Supply Current (NB SOIC-16 column) IS 215 mA θJA = 105 °C/W, VI = 5.5 V, TJ = 150 °C, TA = 25 °C 23
Device Power Dissipation (NB SOIC-16 column) PD 415 mW VDD1 = VDD2 = 5.5 V; TJ = 150 °C; CL = 15 pF; 150 Mbps 23
VDD Undervoltage Threshold (rising) VDDUV+ 1.95 2.24 2.375 V VDD1, VDD2 rising 12
VDD Undervoltage Threshold (falling) VDDUV- 1.88 2.16 2.325 V VDD1, VDD2 falling 12
VDD Undervoltage Hysteresis VDDHYS 50 70 95 mV 12
Positive-Going Input Threshold VT+ 1.4 1.67 1.9 V All inputs rising 12
Negative-Going Input Threshold VT- 1 1.23 1.4 V All inputs falling 12
Input Hysteresis VHYS 0.38 0.44 0.5 V 12
High Level Input Voltage VIH 2 V 12
Low Level Input Voltage VIL 0.8 V 12
High Level Output Voltage VOH 4.8 V loh = -4 mA 12
Low Level Output Voltage VOL 0.2 0.4 V lol = 4 mA 12
Input Leakage Current IL -10 10 μA 12
DC Supply Current VDD1 (Si8651Bx) 1.5 2.4 mA VDD1; VI = 0(Bx), 1(Ex) 13
DC Supply Current VDD2 (Si8651Bx) 2.7 4.1 mA VDD2; VI = 0(Bx), 1(Ex) 13
DC Supply Current VDD1 (Si8651Bx) 6.6 9.2 mA VDD1; VI = 1(Bx), 0(Ex) 13
DC Supply Current VDD2 (Si8651Bx) 4 6 mA VDD2; VI = 1(Bx), 0(Ex) 13
1 Mbps Supply Current VDD1 (Si8651Bx) 4.2 5.8 mA All inputs 500 kHz square wave, CI = 15 pF on all outputs 13
1 Mbps Supply Current VDD2 (Si8651Bx) 3.8 5.3 mA All inputs 500 kHz square wave, CI = 15 pF on all outputs 13
10 Mbps Supply Current VDD1 (Si8651Bx) 4.4 6.2 mA All inputs 5 MHz square wave, CI = 15 pF on all outputs 13
10 Mbps Supply Current VDD2 (Si8651Bx) 4.9 6.9 mA All inputs 5 MHz square wave, CI = 15 pF on all outputs 13
100 Mbps Supply Current VDD1 (Si8651Bx) 8 10.8 mA All inputs 50 MHz square wave, CI = 15 pF on all outputs 14
100 Mbps Supply Current VDD2 (Si8651Bx) 18.4 24 mA All inputs 50 MHz square wave, CI = 15 pF on all outputs 14
Maximum Data Rate 0 150 Mbps 14
Minimum Pulse Width 5 ns 14
Propagation Delay tPHL, tPLH 5 8 13 ns See Figure 4.2 14
Pulse Width Distortion /tPLH, tPHL/ 0.2 4.5 ns See Figure 4.2 14
Propagation Delay Skew tPSK(P-P) 2 4.5 ns 14
Channel-Channel Skew tPSK 0.4 2.5 ns 14
Output Rise Time tr 2.5 4 ns CL = 15 pF 14
Output Fall Time tf 2.5 4 ns CL = 15 pF 14
Common Mode Transient Immunity CMTI 35 50 kV/μs VI = VDD or 0 V, VCM = 1500 V 14
Enable to Data Valid ten1 6 11 ns 14
Enable to Data Tri-State ten2 8 12 ns 14
Start-up Time tSU 15 40 μs 14
IC Junction-to-Air Thermal Resistance (NB SOIC-16/QSOP-16 column) θJA 105 °C/W 24

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 32

CAD (KiCad official)

  • Symbol: SI8651BB-B-IS1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: si8651bb-b-is1-etched.step / si8651bb-b-is1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si8651bb-b-is1.step / si8651bb-b-is1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SKYWORKS SOLUTIONS INC. datasheet (43 pp, sha256 09d461e7e459e538, retrieved 2026-10-25, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF