MAX4478AUD+ from Maxim Integrated, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUTA	output	Amplifier A output, rail-to-rail swing.
2	INA-	input	Amplifier A inverting input.
3	INA+	input	Amplifier A noninverting input.
4	VDD	power_in	Positive supply, 2.7V to 5.5V single-supply; bypass with a 0.1µF ceramic capacitor close to the pin.
5	INB+	input	Amplifier B noninverting input.
6	INB-	input	Amplifier B inverting input.
7	OUTB	output	Amplifier B output, rail-to-rail swing.
8	OUTC	output	Amplifier C output, rail-to-rail swing.
9	INC-	input	Amplifier C inverting input.
10	INC+	input	Amplifier C noninverting input.
11	VSS	power_in	Negative supply; connect to ground for single-supply operation.
12	IND+	input	Amplifier D noninverting input.
13	IND-	input	Amplifier D inverting input.
14	OUTD	output	Amplifier D output, rail-to-rail swing.

Key specifications

Parameter	Value
Manufacturer	Maxim Integrated
Package	TSSOP-14
Category	Amplifiers
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage Range	VDD	2.7		5.5	V	Note 3	5
Quiescent Supply Current Per Amplifier	ID		2.5	4.4	mA	Normal mode, VDD = 5V	5
Input Offset Voltage	VOS	-350	70	350	µV	TA = +25°C	5
Input Offset Voltage	VOS	-750		750	µV	TA = -40°C to +125°C	5
Input Offset Voltage Tempco	TCVOS	-6	0.3	6	µV/°C		5
Input Bias Current	IB	-150	1	150	pA	Note 4	5
Input Offset Current	IOS	-150	1	150	pA	Note 4	5
Common-Mode Rejection Ratio	CMRR	90	115		dB	(VSS - 0.2V) ≤ VCM ≤ (VDD, 1.6V), TA = +25°C	5
Common-Mode Rejection Ratio	CMRR	90			dB	(VSS - 0.1V) ≤ VCM ≤ (VDD, 1.7V), TA = -40°C to +125°C	5
Power-Supply Rejection Ratio	PSRR	90	120		dB	VDD = 2.7 to 5.5V	5
Large-Signal Voltage Gain	AVOL	90	120		dB	RL = 10kΩ to VDD/2; VOUT = 100mV to (VDD - 125mV)	5
Large-Signal Voltage Gain	AVOL	85	110		dB	RL = 1kΩ to VDD/2; VOUT = 200mV to (VDD - 250mV)	5
Output Voltage Swing High	VDD - VOH		10	45	mV	/VIN+ - VIN-/ ≥ 10mV, RL = 10kΩ to VDD/2	5
Output Voltage Swing Low	VOL - VSS		10	40	mV	/VIN+ - VIN-/ ≥ 10mV, RL = 10kΩ to VDD/2	5
Output Voltage Swing High	VDD - VOH		80	200	mV	/VIN+ - VIN-/ ≥ 10mV, RL = 1kΩ to VDD/2	5
Output Voltage Swing Low	VOL - VSS		50	150	mV	/VIN+ - VIN-/ ≥ 10mV, RL = 1kΩ to VDD/2	5
Output Voltage Swing High	VDD - VOH		100	300	mV	/VIN+ - VIN-/ ≥ 10mV, RL = 500Ω to VDD/2	5
Output Voltage Swing Low	VOL - VSS		80	250	mV	/VIN+ - VIN-/ ≥ 10mV, RL = 500Ω to VDD/2	5
Quiescent Supply Current Per Amplifier	ID		2.2		mA	Normal mode, VDD = 3V	5
Differential Input Resistance	RIN		1000		GΩ		5
Output Short-Circuit Current	ISC		48		mA		5
Input Capacitance	CIN		10		pF		5
Gain-Bandwidth Product	GBWP		10		MHz	MAX4475-MAX4478, AV = +1V/V	6
Slew Rate	SR		3		V/µs	MAX4475-MAX4478, AV = +1V/V	6
Full-Power Bandwidth			0.4		MHz	MAX4475-MAX4478, AV = +1V/V (Note 5)	6
Peak-to-Peak Input Noise Voltage	en(P-P)		260		nVP-P	f = 0.1Hz to 10Hz	6
Input Voltage-Noise Density	en		4.5		nV/√Hz	f = 1kHz	6
Input Current-Noise Density	in		0.5		fA/√Hz	f = 1kHz	6
Total Harmonic Distortion Plus Noise	THD + N		0.0002		%	VOUT = 2VP-P, AV = +1V/V, RL = 10kΩ to GND, f = 1kHz	6
Capacitive-Load Stability			200		pF	No sustained oscillations	6
Gain Margin	GM		12		dB		6
Phase Margin	FM		70		degrees	MAX4475-MAX4478, AV = +1V/V	6
Settling Time			2		µs	To 0.01%, VOUT = 2V step	6
Power-Up Delay Time			13		µs	VDD = 0 to 5V step, VOUT stable to 0.1%	6
Power-Supply Voltage	VDD to VSS	-0.3		6	V		2
Analog Input Voltage	IN_+, IN_-	-0.3		0.3	V	(VSS - 0.3V) to (VDD + 0.3V); limits relative to supply rails	2
Continuous Input Current	IN+, IN-	-10		10	mA		2
Operating Temperature Range		-40		125	°C		2
Junction Temperature				150	°C		2
Storage Temperature Range		-65		150	°C		2
Lead Temperature				300	°C	soldering, 10s	2
Soldering Temperature				260	°C	reflow	2
Thermal Resistance Junction to Ambient	θJA		110		°C/W	TSSOP-14 U14+2, single-layer board	3
Thermal Resistance Junction to Case	θJC		30		°C/W	TSSOP-14 U14+2, single-layer board	3
Thermal Resistance Junction to Ambient	θJA		100.4		°C/W	TSSOP-14 U14+2, multi-layer board	3

CAD (KiCad official)

Symbol: MAX4478AUD+
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: max4478aud-etched.step / max4478aud-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max4478aud.step / max4478aud.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Maxim Integrated datasheet (17 pp, sha256 221f44dfcfbbd4fb, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MAX4478AUD+

Verified MAX4478AUD+

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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