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Contents

README

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CSD17318Q2

Texas Instruments · Pre-ordered Chips · WSON-6(2x2)

CSD17318Q2 from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal, connected internally to the drain thermal pad and to the other drain pins (2, 5, 6); the device is rated for VDS of 30 V.
2 D passive Drain terminal, connected internally to the drain thermal pad and to the other drain pins (1, 5, 6); the device is rated for VDS of 30 V.
3 G input Gate terminal, optimized for 5 V gate drive with an absolute maximum VGS of ±10 V.
4 S passive Source terminal, connected internally to the source thermal pad; the continuous drain current is rated at 10 A (RθJA-limited) and 21.5 A (package limited).
5 D passive Drain terminal, connected internally to the drain thermal pad and to the other drain pins (1, 2, 6); the device is rated for VDS of 30 V.
6 D passive Drain terminal, connected internally to the drain thermal pad and to the other drain pins (1, 2, 5); the device is rated for VDS of 30 V.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(2x2)
Category Interface ICs
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDS 30 V TA = 25°C 1
Gate-to-Source Voltage VGS -10 10 V 1
Continuous Drain Current (Package Limited) ID 21.5 A Package Limited 1
Continuous Drain Current (Silicon Limited) ID 25 A Silicon Limited, TC = 25°C 1
Continuous Drain Current ID 10 A 1
Pulsed Drain Current IDM 68 A TA = 25°C 1
Power Dissipation PD 2.5 W 1
Power Dissipation PD 16 W TC = 25°C 1
Operating Junction, Storage Temperature TJ, TSTG -55 150 °C 1
Avalanche Energy, Single Pulse EAS 7.7 mJ ID = 12.4A, L = 0.1mH, RG = 25Ω 1
Gate-to-source threshold voltage VGS(th) 0.6 0.9 1.2 V VDS = VGS, ID = 250μA 3
Drain-to-source on-resistance RDS(on) 20 30 mΩ VGS = 2.5V, ID = 8A 3
Drain-to-source on-resistance RDS(on) 13.9 16.9 mΩ VGS = 4.5V, ID = 8A 3
Drain-to-source on-resistance RDS(on) 12.6 15.1 mΩ VGS = 8V, ID = 8A 3
Series gate resistance RG 1 2 Ω 3
Input capacitance Ciss 676 879 pF VGS = 0V, VDS = 15V, ƒ = 1MHz 3
Output capacitance Coss 71 92 pF 3
Reverse transfer capacitance Crss 39 51 pF 3
Diode forward voltage VSD 0.8 1 V ISD = 8A, VGS = 0V 3
Drain-to-source leakage IDSS 1 μA VGS = 0V, VDS = 24V 3
Drain-to-source voltage BVDSS 30 V VGS = 0V, ID = 250μA 3
Gate-to-source leakage IGSS 100 nA VDS = 0V, VGS = 10V 3
Transconductance gfs 42 S VDS = 3V, ID = 8A 3
Gate charge total (4.5 V) Qg 6 nC VDS = 15V, ID = 8A 3
Gate charge gate-to-drain Qgd 1.3 nC VDS = 15V, ID = 8A 3
Gate charge gate-to-source Qgs 1.5 nC VDS = 15V, ID = 8A 3
Gate charge at Vth Qg(th) 0.7 nC VDS = 15V, ID = 8A 3
Output charge Qoss 2.7 nC VDS = 15V, VGS = 0V 3
Turnon delay time td(on) 5 ns VDS = 15V, VGS = 4.5V, ID = 8A, RG = 2Ω 3
Rise time tr 16 ns 3
Turnoff delay time td(off) 13 ns 3
Fall time tf 4 ns 3
Reverse recovery charge Qrr 2.9 nC VDD= 15V, IF = 8A, di/dt = 300A/μs 3
Reverse recovery time trr 12 ns 3
Thermal resistance junction-to-case RθJC 7.9 °C/W 3
Thermal resistance junction-to-ambient RθJA 65 °C/W 3

CAD (KiCad official)

  • Symbol: CSD17318Q2
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
  • 3D model files: csd17318q2-etched.step / csd17318q2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); csd17318q2.step / csd17318q2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 463e47ea8aeac640, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF