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PNM723T703E0-2
Public Made by Adomby adom
Shanghai Prisemi Elec MOSFETs, SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPNM723T703E0-2
Shanghai Prisemi Elec · MOSFETs · SOT-723
PNM723T703E0-2 from Shanghai Prisemi Elec, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the N-channel enhancement MOSFET; gate threshold VGS(th) is 0.5 to 1.5 V at VDS = VGS and ID = 250 μA, and VGS is rated ±20 V. |
| 2 | S | passive | Source of the MOSFET; the datasheet gives no separate pin limit for this terminal beyond the device-level ratings (VDS 40 V, VGS ±20 V, continuous ID 0.18 A). |
| 3 | D | passive | Drain of the MOSFET; rated VDS 40 V with continuous drain current ID 0.18 A (pulsed 0.36 A) and total power dissipation PD 150 mW at TA = 25 ℃. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Prisemi Elec |
| Package | SOT-723 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VDSS | 40 | V | ID =10μA, VGS=0V | 1 | ||
| Zero Gate Voltage Drain Current | IDSS | 0.5 | μA | VDS =40V, VGS=0V | 1 | ||
| Gate-Body Leakage Current | IGSS | -10 | 10 | μA | VDS =0V, VGS=±20V | 1 | |
| Gate Threshold Voltage | VGS(th) | 0.5 | 1.5 | V | VDS =VGS, ID =250μA | 1 | |
| Static Drain-Source On-Resistance | RDS(ON) | 7.5 | Ω | VGS=5V, ID =0.05A | 1 | ||
| Input Capacitance | CISS | 40 | pF | VGS=0V, VDS =25V, f=1MHz | 1 | ||
| Output Capacitance | CDSS | 20 | pF | 1 | |||
| Reverse Transfer Capacitance | CRSS | 5 | pF | 1 | |||
| Turn-On Delay Time | td(on) | 20 | ns | VDS=30V, VGS =10V, RG=25Ω, RL=150Ω, ID =0.2A | 1 | ||
| Turn-Off Delay Time | td(off) | 20 | ns | 1 | |||
| Drain-Source Voltage | VDS | 40 | V | 2 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 2 | ||
| Drain Current, Continuous | ID | 0.18 | A | 2 | |||
| Drain Current, Pulsed | ID | 0.36 | A | 2 | |||
| Total Power Dissipation | PD | 150 | mW | TA=25℃ | 2 |
CAD (KiCad official)
- Symbol:
PNM723T703E0-2 - Footprint:
Package_TO_SOT_SMD:SOT-723 - 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
pnm723t703e0-2-etched.step/pnm723t703e0-2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pnm723t703e0-2.step/pnm723t703e0-2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Prisemi Elec datasheet (4 pp, sha256
c2846c46570be409, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).