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GD25Q80ETIGR

Public Made by Adom

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GigaDevice Semicon Beijing NOR FLASH, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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GD25Q80ETIGR

GigaDevice Semicon Beijing · NOR FLASH · SOP-8

GD25Q80ETIGR from GigaDevice Semicon Beijing, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select input, active low. Must be driven high when the device is not selected; must not be left floating after power-on. Enables the SPI interface when driven low.
2 SO/IO1 bidirectional Serial Data Output in Standard SPI mode; becomes bidirectional I/O1 in Dual/Quad SPI modes (Data Input Output 1). Data shifts on the falling edge of SCLK during output.
3 WP#/IO2 bidirectional Write Protect input (active low) in Standard/Dual SPI modes: when low, protects the Block Protect bits (BP4-BP0) and SRP bits (SRP1, SRP0) from being written. Becomes bidirectional I/O2 (Data Input Output 2) in Quad SPI mode.
4 VSS power_in Ground reference for the device (0 V).
5 SI/IO0 bidirectional Serial Data Input in Standard SPI mode (data latched on rising edge of SCLK); becomes bidirectional I/O0 (Data Input Output 0) in Dual/Quad SPI modes.
6 SCLK input Serial Clock input. Input data is latched on the rising edge of SCLK; output data shifts on the falling edge. Supports both SPI Mode 0 and Mode 3 up to 133 MHz.
7 HOLD#/IO3 bidirectional Hold input (active low) in Standard/Dual SPI modes: pauses serial communication without deselecting the device. Becomes bidirectional I/O3 (Data Input Output 3) in Quad SPI mode.
8 VCC power_in Power supply input, 2.7 V to 3.6 V. Must be decoupled to VSS with a local bypass capacitor.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package SOP-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • GD25Q80ETIGR
  • GD25Q80ETIGRETJG
  • GD25Q80ETIGRETEG
  • GD25Q80ETIGRETFG
  • GD25Q80ETIGRESIG
  • GD25Q80ETIGRESJG
  • GD25Q80ETIGRESEG
  • GD25Q80ETIGRESFG
  • GD25Q80ETIGREEIG
  • GD25Q80ETIGREEJG
  • GD25Q80ETIGREEEG
  • GD25Q80ETIGREEFG
  • GD25Q80ETIGRENIG
  • GD25Q80ETIGRENJG
  • GD25Q80ETIGRENEG
  • GD25Q80ETIGRENFG
  • GD25Q80ETIGREWIG
  • GD25Q80ETIGREWJG
  • GD25Q80ETIGREWEG
  • GD25Q80ETIGREWFG

CAD (KiCad official)

  • Symbol: GD25Q80ETIGR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: gd25q80etigr-etched.step / gd25q80etigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25q80etigr.step / gd25q80etigr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (56 pp, sha256 d73ddac270234097, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF