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ATSAM4E16CA-AN

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Microchip Tech Pre-ordered MCUs, LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsam4e16ca-anfactory-2.0.0extractor-text

Changed since verified ATSAM4E16CA-AN

by Ray · last 31 Oct 2026 · 1 record · files changed since
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Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 100 pinschanged since
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAM4E16CA-AN · LQFP-100(14x14) · 100 pins
  • ✓copper: 100 copper pads, none touching another net
  • ✓datasheet: all 100 pin names found in the 1461-page datasheet
  • ✓distributor: lcsc C1340106, digikey ATSAM4E16CA-AN-ND, mouser 556-ATSAM4E16CA-AN
  • ✓family: LQFP-100_14x14mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-w_65ham1/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 100 pins = 100 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 100 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files! atsam4e16ca-an.kicad_sym✓ atsam4e16ca-an.kicad_mod✓ atsam4e16ca-an.step
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Contents

README

markdown

ATSAM4E16CA-AN

Microchip Tech · Pre-ordered MCUs · LQFP-100(14x14)

ATSAM4E16CA-AN from Microchip Tech, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD0 bidirectional Parallel I/O line PD0 (PIOD).
2 PD31 bidirectional Parallel I/O line PD31 (PIOD).
3 GND power_in Ground pin.
4 VDDOUT power_out Voltage regulator output pin; its function is not described in the supplied text beyond the name.
5 VDDIN power_in Voltage regulator input, DAC and Analog Comparator power supply, 1.62V to 3.6V.
6 GND power_in Ground pin.
7 GND power_in Ground pin.
8 GND power_in Ground pin.
9 ADVREF power_in Reference voltage input for the Analog Front-End and DAC.
10 GND power_in Ground pin.
11 PB1 bidirectional Parallel I/O line PB1, also analog input AFE0_AD5 / RTCOUT1.
12 PB0 bidirectional Parallel I/O line PB0, also analog input AFE0_AD4 / RTCOUT0.
13 PA20/PGMD8 bidirectional Parallel I/O line PA20 shared with fast flash programming data PGMD8, also AFE0_AD3/WKUP10.
14 PA19/PGMD7 bidirectional Parallel I/O line PA19 shared with fast flash programming data PGMD7, also AFE0_AD2/WKUP9.
15 PA18/PGMD6 bidirectional Parallel I/O line PA18 shared with fast flash programming data PGMD6, also AFE0_AD1.
16 PA17/PGMD5 bidirectional Parallel I/O line PA17 shared with fast flash programming data PGMD5, also AFE0_AD0.
17 PB2 bidirectional Parallel I/O line PB2, also analog input AFE1_AD0/WKUP12.
18 VDDCORE power_in Core, first flash rail, embedded memories and peripherals supply, 1.08V to 1.32V.
19 VDDIO power_in Peripheral I/O, second flash rail, backup part, USB transceiver and oscillator supply, 1.62V to 3.6V.
20 PB3 bidirectional Parallel I/O line PB3, also analog input AFE1_AD1.
21 PA21/PGMD9 bidirectional Parallel I/O line PA21 shared with fast flash programming data PGMD9, also AFE1_AD2.
22 VDDCORE power_in Core, first flash rail, embedded memories and peripherals supply, 1.08V to 1.32V.
23 PD30 bidirectional Parallel I/O line PD30 (PIOD).
24 PA7/PGMNVALID bidirectional Parallel I/O line PA7 shared with PGMNVALID; held low with JTAGSEL high and TST high to select JTAG boundary scan.
25 PA8/PGMM0 bidirectional Parallel I/O line PA8 shared with programming mode PGMM0, also AFE0_ADTRG.
26 PA22/PGMD10 bidirectional Parallel I/O line PA22 shared with fast flash programming data PGMD10, also AFE1_AD3.
27 PA13/PGMD1 bidirectional Parallel I/O line PA13 shared with fast flash programming data PGMD1.
28 VDDIO power_in Peripheral I/O, second flash rail, backup part, USB transceiver and oscillator supply, 1.62V to 3.6V.
29 GND power_in Ground pin.
30 PA16/PGMD4 bidirectional Parallel I/O line PA16 shared with fast flash programming data PGMD4.
31 PA23/PGMD11 bidirectional Parallel I/O line PA23 shared with fast flash programming data PGMD11.
32 PD27 bidirectional Parallel I/O line PD27 (PIOD).
33 PA15/PGMD3 bidirectional Parallel I/O line PA15 shared with fast flash programming data PGMD3.
34 PA14/PGMD2 bidirectional Parallel I/O line PA14 shared with fast flash programming data PGMD2.
35 PD25 bidirectional Parallel I/O line PD25 (PIOD).
36 PD26 bidirectional Parallel I/O line PD26 (PIOD).
37 PD24 bidirectional Parallel I/O line PD24 (PIOD).
38 PA24/PGMD12 bidirectional Parallel I/O line PA24 shared with fast flash programming data PGMD12.
39 PD23 bidirectional Parallel I/O line PD23 (PIOD).
40 PA25/PGMD13 bidirectional Parallel I/O line PA25 shared with fast flash programming data PGMD13.
41 PD22 bidirectional Parallel I/O line PD22 (PIOD).
42 PA26/PGMD14 bidirectional Parallel I/O line PA26 shared with fast flash programming data PGMD14.
43 PD21 bidirectional Parallel I/O line PD21 (PIOD).
44 PA11/PGMM3 bidirectional Parallel I/O line PA11 shared with programming mode PGMM3.
45 PD20 bidirectional Parallel I/O line PD20 (PIOD).
46 PA10/PGMM2 bidirectional Parallel I/O line PA10 shared with programming mode PGMM2.
47 PD19 bidirectional Parallel I/O line PD19 (PIOD).
48 PA12/PGMD0 bidirectional Parallel I/O line PA12 shared with fast flash programming data PGMD0.
49 PD18 bidirectional Parallel I/O line PD18 (PIOD).
50 PA27/PGMD15 bidirectional Parallel I/O line PA27 shared with fast flash programming data PGMD15.
51 PD28 bidirectional Parallel I/O line PD28 (PIOD).
52 PA5/PGMRDY bidirectional Parallel I/O line PA5 shared with fast flash programming ready signal PGMRDY.
53 PD17 bidirectional Parallel I/O line PD17 (PIOD).
54 PA9/PGMM1 bidirectional Parallel I/O line PA9 shared with programming mode PGMM1.
55 PA4/PGMNCMD bidirectional Parallel I/O line PA4 shared with fast flash programming PGMNCMD.
56 PD16 bidirectional Parallel I/O line PD16 (PIOD).
57 PB6 bidirectional Parallel I/O line PB6.
58 NRST bidirectional Active-low microcontroller reset, input by default, driven low by the reset controller, with permanent pull-up of about 100 kΩ to VDDIO.
59 PD14 bidirectional Parallel I/O line PD14 (PIOD).
60 TST input Test select for JTAG boundary scan or fast flash programming mode, with permanent pull-down of about 15 kΩ to GND so it can be left unconnected.
61 PB12 bidirectional Parallel I/O line PB12.
62 PD13 bidirectional Parallel I/O line PD13 (PIOD).
63 PB7 bidirectional Parallel I/O line PB7.
64 PA3 bidirectional Parallel I/O line PA3.
65 PD12 bidirectional Parallel I/O line PD12 (PIOD).
66 PA2 bidirectional Parallel I/O line PA2.
67 GND power_in Ground pin.
68 VDDIO power_in Peripheral I/O, second flash rail, backup part, USB transceiver and oscillator supply, 1.62V to 3.6V.
69 PD11 bidirectional Parallel I/O line PD11 (PIOD).
70 PA1/PGMEN1 bidirectional Parallel I/O line PA1 shared with programming enable PGMEN1.
71 PD10 bidirectional Parallel I/O line PD10 (PIOD).
72 PA0/PGMEN0 bidirectional Parallel I/O line PA0 shared with programming enable PGMEN0.
73 JTAGSEL input JTAG selection input, active high, selects JTAG boundary scan when high with PA7 low, with permanent pull-down of about 15 kΩ to GND.
74 PB4 bidirectional Parallel I/O line PB4.
75 PD15 bidirectional Parallel I/O line PD15 (PIOD).
76 PD29 bidirectional Parallel I/O line PD29 (PIOD).
77 PB5 bidirectional Parallel I/O line PB5.
78 PD9 bidirectional Parallel I/O line PD9 (PIOD).
79 PA28 bidirectional Parallel I/O line PA28.
80 PD8 bidirectional Parallel I/O line PD8 (PIOD).
81 PA6/PGMNOE bidirectional Parallel I/O line PA6 shared with fast flash programming PGMNOE.
82 PA30 bidirectional Parallel I/O line PA30.
83 PA31 bidirectional Parallel I/O line PA31.
84 PD7 bidirectional Parallel I/O line PD7 (PIOD).
85 PD6 bidirectional Parallel I/O line PD6 (PIOD).
86 VDDCORE power_in Core, first flash rail, embedded memories and peripherals supply, 1.08V to 1.32V.
87 PD5 bidirectional Parallel I/O line PD5 (PIOD).
88 PD4 bidirectional Parallel I/O line PD4 (PIOD).
89 PD3 bidirectional Parallel I/O line PD3 (PIOD).
90 PA29 bidirectional Parallel I/O line PA29.
91 PD2 bidirectional Parallel I/O line PD2 (PIOD).
92 PD1 bidirectional Parallel I/O line PD1 (PIOD).
93 VDDIO power_in Peripheral I/O, second flash rail, backup part, USB transceiver and oscillator supply, 1.62V to 3.6V.
94 PB10 bidirectional Parallel I/O line PB10.
95 PB11 bidirectional Parallel I/O line PB11.
96 VDDPLL power_in Supply for the PLL, Fast RC and 3 to 20 MHz oscillator, 1.08V to 1.32V.
97 PB14 bidirectional Parallel I/O line PB14.
98 PB8 bidirectional Parallel I/O line PB8.
99 PB9 bidirectional Parallel I/O line PB9.
100 PB13 bidirectional Parallel I/O line PB13.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC before performing the calculation, making the base address for the calculation word-aligned. ̶ Note: To generate the address of an instruction, the constant based on the value of the PC must be 105

CAD (KiCad official)

  • Symbol: ATSAM4E16CA-AN
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: atsam4e16ca-an-etched.step / atsam4e16ca-an-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsam4e16ca-an.step / atsam4e16ca-an.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1461 pp, sha256 3d74ff966b5d9bc8, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF