component
A1233LLTR-T
Public Made by Adomby adom
Allegro MicroSystems, LLC Magnetic Sensors, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownA1233LLTR-T
Allegro MicroSystems, LLC · Magnetic Sensors · SOIC-8
A1233LLTR-T from Allegro MicroSystems, LLC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Input power supply (3.5 to 24 V operating); tie to GND with a bypass capacitor (0.1 µF recommended). |
| 2 | DIR | output | Open-drain output signal indicating direction of target movement; off (high) for E1 to E2 motion and on (low) for E2 to E1, with 30 to 70 mA current limit. |
| 3 | OUTA | output | Output from Hall element E1 via a Schmitt circuit, with 30 to 70 mA output current limit. |
| 4 | SPD | output | Output signal indicating speed of target movement, the XOR of the two Hall element outputs, with 30 to 70 mA current limit. |
| 5 | OUTB | output | Output from Hall element E2 via a Schmitt circuit, with 30 to 70 mA output current limit. |
| 6 | NC | unconnected | No connection. |
| 7 | NC | unconnected | No connection. |
| 8 | GND | power_in | Ground connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOIC-8 |
| Category | Sensors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 3.5 | 24 | V | Operating, TA ≤ 150°C | 4 | |
| Output Leakage Current | IOUTPUT(OFF) | 1 | 10 | μA | All outputs, VOUT ≤ VCC(max) | 4 | |
| Supply Current | ICC(OFF), ICC(ON) | 2.5 | 4.5 | 8 | mA | B < BRP(A) and B < BRP(B), or B > BOP(A) and B > BOP(B) | 4 |
| Low Output Voltage | VOUTPUT(ON) | 160 | 500 | mV | All outputs, Output = On, IOUTPUT(SINK) = 20 mA | 4 | |
| Output Current Limit | IOUTLIM | 30 | 70 | mA | All outputs | 4 | |
| Speed Output Delay | ΔtDIRSPD | 2 | 5 | µs | Delay between direction output changing and speed output transition, VCC = 5 V, CLOAD = 12 pF, RLOAD = 820 Ω, RLOAD connected to 5 V | 4 | |
| Supply Zener Voltage | VZ | 28 | V | ICC = ICC(max) + 3 mA, TA = 25°C | 4 | ||
| Supply Zener Current | IZ | 11 | mA | VS = 28 V | 4 | ||
| Reverse-Battery Current | IRCC | 2 | 15 | mA | VRCC = -18 V, TJ < TJ(max) | 4 | |
| Undervoltage Lockout | VUVLO | 3.4 | V | 4 | |||
| Operate Point (Channel A and B) | BOP | -35 | 15 | 55 | G | B(A) > BOP(A), B(B) > BOP(B) | 4 |
| Release Point (Channel A and B) | BRP | -55 | -15 | 35 | G | B(A) < BOP(A), B(B) < BOP(B) | 4 |
| Hysteresis (Channel A and B) | Bhys | 10 | 30 | 60 | G | BOP, BRP | 4 |
| Operate Symmetry | SYMOP(AB) | -50 | 50 | G | BOP(A), BOP(B) | 4 | |
| Release Symmetry | SYMRP(AB) | -50 | 50 | G | BRP(A), BRP(B) | 4 | |
| Chopping Frequency | fC | 520 | kHz | 4 | |||
| Output Rise Time | tr | 0.3 | µs | CLOAD = 20 pF, RLOAD = 820 Ω | 4 | ||
| Output Fall Time | tf | 0.2 | µs | CLOAD = 20 pF, RLOAD = 820 Ω | 4 | ||
| Power-On Time | tON | 35 | µs | B > BOP + 10 G or B < BRP, 10 G | 4 | ||
| Power-Off Time | tOFF | 36 | µs | B > BOP + 10 G or B < BRP, 10 G | 4 | ||
| Supply Voltage (absolute maximum) | VCC | 26.5 | V | 2 | |||
| Reverse Battery Voltage | VRCC | -18 | V | 2 | |||
| Output Off Voltage | VOUTPUT | 26.5 | V | Rating printed as VCC | 2 | ||
| Reverse Output Voltage | VROUT | -0.5 | V | 2 | |||
| Reverse Output Current | IROUT | -10 | mA | 2 | |||
| Output Sink Current | IOUTPUT(Sink) | 30 | mA | 2 | |||
| Operating Ambient Temperature | TA | -40 | 150 | °C | Range L | 2 | |
| Maximum Junction Temperature | TJ(max) | 165 | °C | 2 | |||
| Storage Temperature | Tstg | -65 | 170 | °C | 2 | ||
| Package Thermal Resistance | RθJA | 140 | °C/W | Package L, single-sided PCB with copper limited to solder pads | 5 | ||
| Package Thermal Resistance | RθJA | 80 | °C/W | Package L, 4-layer PCB based on JEDEC standard | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | surface-mount package. Both packages are lead (Pb) free, with 100% matte-tin leadframe plating. | 2 |
CAD (KiCad official)
- Symbol:
A1233LLTR-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
a1233lltr-t-etched.step/a1233lltr-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);a1233lltr-t.step/a1233lltr-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems, LLC datasheet (12 pp, sha256
11f5c306234f52f9, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).