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MCP4441T-503E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP4441T-503E
Microchip Tech · Digital Potentiometers · TSSOP-20
MCP4441T-503E from Microchip Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3A | passive | Potentiometer 3 terminal A, which is the fixed Full Scale connection and must be between VSS and VDD. |
| 2 | P3W | passive | Potentiometer 3 wiper terminal, which must be between VSS and VDD and can carry both positive and negative current. |
| 3 | P3B | passive | Potentiometer 3 terminal B, which is the fixed Zero Scale connection and must be between VSS and VDD. |
| 4 | HVC/A0 | input | High Voltage Command and I2C Address 0 input; the A0 value is latched at POR/BOR and a high voltage (VIHH) selects High Voltage command mode. |
| 5 | SCL | input | I2C serial clock input, which accepts only external clock signals since the device is a slave. |
| 6 | SDA | bidirectional | I2C serial data I/O, implemented as an open-drain N-channel driver. |
| 7 | VSS | power_in | Device ground reference. |
| 8 | P1B | passive | Potentiometer 1 terminal B, which is the fixed Zero Scale connection and must be between VSS and VDD. |
| 9 | P1W | passive | Potentiometer 1 wiper terminal, which must be between VSS and VDD and can carry both positive and negative current. |
| 10 | P1A | passive | Potentiometer 1 terminal A, which is the fixed Full Scale connection and must be between VSS and VDD. |
| 11 | P0A | passive | Potentiometer 0 terminal A, which is the fixed Full Scale connection and must be between VSS and VDD. |
| 12 | P0W | passive | Potentiometer 0 wiper terminal, which must be between VSS and VDD and can carry both positive and negative current. |
| 13 | P0B | passive | Potentiometer 0 terminal B, which is the fixed Zero Scale connection and must be between VSS and VDD. |
| 14 | WP | input | Hardware EEPROM Write Protect input, which forces the nonvolatile memory to be write protected. |
| 15 | RESET | input | Hardware reset input, which forces the device into the POR/BOR state. |
| 16 | A1 | input | I2C Address 1 input, which together with A0 allows up to 4 devices on one I2C bus. |
| 17 | VDD | power_in | Positive power supply input relative to VSS; electrical performance may not meet specifications while VDD is below 2.7V. |
| 18 | P2B | passive | Potentiometer 2 terminal B, which is the fixed Zero Scale connection and must be between VSS and VDD. |
| 19 | P2W | passive | Potentiometer 2 wiper terminal, which must be between VSS and VDD and can carry both positive and negative current. |
| 20 | P2A | passive | Potentiometer 2 terminal A, which is the fixed Full Scale connection and must be between VSS and VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-20 |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistance tolerance | -20 | 20 | % | Resistance (±20%), -503 devices | 5 | ||
| Nominal resistance RAB | RAB | 40 | 50 | 60 | kΩ | -503 devices (Note 1) | 5 |
| Nominal resistance match 50 kΩ | (/RABWC - RABMEAN/)/RABMEAN | 0.2 | 1 | % | 50 kΩ | 5 | |
| Wiper resistance RW | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance RW | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Full Scale Error 50 kΩ 7-bit | VWFSE | -0.5 | -0.1 | LSb | 50 kΩ 7-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Zero Scale Error 50 kΩ 7-bit | VWZSE | 0.1 | 0.5 | LSb | 50 kΩ 7-bit 3.0V ≤ VDD ≤ 5.5V | 7 | |
| Potentiometer integral non-linearity 7-bit | INL | -0.5 | 0.25 | 0.5 | LSb | 7-bit, MCP44X1 devices only (Note 2) | 7 |
| Potentiometer differential non-linearity 7-bit | DNL | -0.25 | 0.125 | 0.25 | LSb | 7-bit, MCP44X1 devices only (Note 2) | 7 |
| Resistance match full scale 50 kΩ | (/RBWWC - RBWMEAN/)/RBWMEAN | 0.25 | 1.25 | % | 50 kΩ, code = full scale | 5 | |
| Maximum current through A, W or B | IW | 2.5 | mA | Terminal A IAW, W = Full Scale (FS); also terminal B and terminal W | 6 | ||
| Maximum RAB current | IAB | 0.138 | mA | VB = 0V, VA = 5.5V, RAB(MIN) = 40000Ω | 6 | ||
| Supply voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage serial interface only | VDD | 1.8 | 2.7 | V | Serial interface only | 4 | |
| VDD start voltage to ensure wiper reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Supply current serial interface active 3.4 MHz | IDD | 600 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11), write all 0's to volatile Wiper 0 | 4 | ||
| Supply current serial interface active 100 kHz | IDD | 250 | µA | Serial Interface Active, HVC/A0 = VIH (or VIL) (Note 11), write all 0's to volatile Wiper 0, VDD = 5.5V, FSCL @ 100 kHz | 4 | ||
| EE write current | IDD | 575 | µA | EE Write Current (Write Cycle), VDD = 5.5V, FSCL = 400 kHz, write all 0's to nonvolatile Wiper 0 | 4 | ||
| Serial interface inactive supply current | IDD | 2.5 | 5 | µA | Serial Interface Inactive (Stop condition, SCL = SDA = VIH), Wiper = 0, VDD = 5.5V, HVC/A0 = VIH | 4 | |
| Output low voltage SDA | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 10 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD (all pins) and VIN = VSS (all pins except RESET) | 11 | |
| RESET pulse width | tRST | 50 | ns | 12 | |||
| RESET rising edge normal mode | tRSTD | 20 | ns | Wiper driving and I2C interface operational | 12 | ||
| SCL clock frequency standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 13 | |
| SCL clock frequency fast mode | FSCL | 0 | 400 | kHz | Cb = 400 pF, 2.7V - 5.5V | 13 | |
| SCL clock frequency high-speed 3.4 MHz | FSCL | 0 | 3.4 | MHz | Cb = 100 pF, 4.5V - 5.5V | 13 | |
| Pin capacitance | CIN, COUT | 10 | pF | fC = 20 MHz | 11 | ||
| Capacitance PA | CAW | 75 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Capacitance PW | CW | 120 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Capacitance PB | CBW | 75 | pF | f = 1 MHz, Code = Full Scale | 9 | ||
| Bandwidth -3 dB 50 kΩ 7-bit | BW | 200 | kHz | 50 kΩ 7-bit, Code = 40h, load = 30 pF | 7 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal resistance tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Power supply sensitivity 7-bit | PSS | 0.0015 | 0.0035 | %/% | 7-bit, VDD = 2.7V to 5.5V, VA = 2.7V, Code = 40h | 11 | |
| EEPROM write cycle time | tWC | 3 | 10 | ms | 11 | ||
| Specified temperature range | TA | -40 | 125 | °C | 17 | ||
| Storage temperature range | TA | -65 | 150 | °C | 17 | ||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Voltage on VDD with respect to VSS | VDD | -0.6 | 7 | V | 3 | ||
| Voltage on HVC/A0, A1, SCL, SDA, WP, RESET with respect to VSS | -0.6 | 12.5 | V | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Thermal resistance 20L-TSSOP | θJA | 90 | °C/W | 17 |
CAD (KiCad official)
- Symbol:
MCP4441T-503E - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
mcp4441t-503e-etched.step/mcp4441t-503e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4441t-503e.step/mcp4441t-503e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (100 pp, sha256
c64d93992e9b7079, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).