component
ADS7861IBRHBT
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS7861IBRHBT
Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)
ADS7861IBRHBT from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH B1+ | input | Noninverting input of Channel B1, a fully differential input that must stay within GND - 300mV to VDD + 0.3V. |
| 2 | CH B1- | input | Inverting input of Channel B1, part of a fully differential input pair. |
| 3 | CH B0+ | input | Noninverting input of Channel B0, a fully differential input. |
| 4 | CH B0- | input | Inverting input of Channel B0, part of a fully differential input pair. |
| 5 | CH A1+ | input | Noninverting input of Channel A1, a fully differential input. |
| 6 | CH A1- | input | Inverting input of Channel A1, part of a fully differential input pair. |
| 7 | CH A0+ | input | Noninverting input of Channel A0, a fully differential input. |
| 8 | CH A0- | input | Inverting input of Channel A0, part of a fully differential input pair. |
| 9 | REFIN | input | Reference input, with an external voltage range of 1.2V to 2.6V (2.5V typical). |
| 10 | REFOUT | output | 2.5V internal reference output, with 2mA typical internal source current. |
| 11 | NC | unconnected | Not connected. |
| 12 | AGND | power_in | Analog ground; connect directly to digital ground (DGND, pin 28 on the QFN). |
| 13 | +VA | power_in | Analog power supply, +5VDC; connect directly to the digital supply and decouple to analog ground with a 0.1µF ceramic capacitor and a 10µF tantalum capacitor. |
| 14 | NC | unconnected | Not connected. |
| 15 | NC | unconnected | Not connected. |
| 16 | M1 | input | Selects the serial outputs: when LOW both Serial A and B are used, when HIGH Serial A carries both Channel A and B data and Serial B is tri-stated. |
| 17 | M0 | input | Selects two-channel (LOW, used with A0) or four-channel (HIGH, sequential conversion starting with A0 and B0) operation. |
| 18 | A0 | input | Address select that works with M0: with M0 LOW, A0 HIGH converts Channels A1 and B1, A0 LOW converts Channels A0 and B0. |
| 19 | CONVST | input | Convert start: a LOW-to-HIGH transition switches the device from sample to hold mode independent of the external clock. |
| 20 | RD | input | Synchronization pulse for the serial output. |
| 21 | CS | input | Chip select: when LOW the Serial A and B outputs are active, when HIGH they are tri-stated. |
| 22 | CLOCK | input | External CMOS-compatible clock input (0.2MHz to 8MHz) that synchronizes conversion; CLOCK = 16 • fSAMPLE. |
| 23 | BUSY | output | Goes HIGH during a conversion and returns LOW after the third LSB has been transmitted on either serial output. |
| 24 | SERIAL DATA A | tri_state | Serial output carrying channel information and 12 data bits, valid on the falling edge of the clock for 16 edges after the rising edge of RD; tri-stated when CS is HIGH. |
| 25 | SERIAL DATA B | tri_state | Serial output carrying channel information and 12 data bits, valid on the falling edge of the clock for 16 edges after the rising edge of RD; tri-stated when CS is HIGH or M1 is HIGH. |
| 26 | NC | unconnected | Not connected. |
| 27 | +VD | power_in | Digital power supply, +5VDC; connect directly to +VA and must be ≤ +VA. |
| 28 | DGND | power_in | Digital ground; connect directly to analog ground. |
| 29 | NC | unconnected | Not connected. |
| 30 | NC | unconnected | Not connected. |
| 31 | NC | unconnected | Not connected. |
| 32 | NC | unconnected | Not connected. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | ADC/DAC/Data Conversion |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Integral Linearity | INL | -1 | 0.5 | 1 | LSB | ADS7861IB | 3 |
| Integral Linearity Match | -1 | 0.5 | 1 | LSB | 3 | ||
| Differential Linearity | DNL | -1 | 0.5 | 1 | LSB | ADS7861IB | 3 |
| Bipolar Offset Error | -3 | 0.5 | 3 | LSB | TA = -40°C to +85°C | 3 | |
| Bipolar Offset Error | -3.5 | 0.5 | 3.5 | LSB | TA = -40°C to +125°C | 3 | |
| Bipolar Offset Error Match | 2 | LSB | ADS7861IB | 3 | |||
| Positive Gain Error | -0.5 | 0.1 | 0.5 | % of FSR | Referenced to REFIN | 3 | |
| Positive Gain Error Match | 1 | LSB | ADS7861IB | 3 | |||
| Negative Gain Error | -0.5 | 0.1 | 0.5 | % of FSR | Referenced to REFIN | 3 | |
| Negative Gain Error Match | 1 | LSB | ADS7861IB | 3 | |||
| Power Supply Rejection Ratio | PSRR | 0.5 | 2 | LSB | 3 | ||
| Input Leakage Current | -1 | 1 | µA | 3 | |||
| Total Harmonic Distortion | THD | -76 | dB | VIN = ±2.5VPP at 100kHz; TA = -40°C to +85°C | 3 | ||
| Total Harmonic Distortion | THD | -75 | dB | VIN = ±2.5VPP at 100kHz; TA = -40°C to +125°C | 3 | ||
| Spurious Free Dynamic Range | SFDR | 76 | dB | VIN = ±2.5VPP at 100kHz; TA = -40°C to +85°C | 3 | ||
| Spurious Free Dynamic Range | SFDR | 75 | dB | VIN = ±2.5VPP at 100kHz; TA = -40°C to +125°C | 3 | ||
| SINAD | SINAD | 70 | dB | VIN = ±2.5VPP at 100kHz | 3 | ||
| Internal Reference Voltage | VREF | 2.475 | 2.5 | 2.525 | V | Internal | 3 |
| External Reference Voltage Range | VREF | 1.2 | 2.5 | 2.6 | V | External | 3 |
| Reference Input Current | 0.05 | 1 | µA | 3 | |||
| Internal Reference Drift | 25 | ppm/°C | ±25 typ | 3 | |||
| Input Capacitance | 15 | pF | Analog input | 3 | |||
| Common-Mode Rejection Ratio | CMRR | 80 | dB | At DC | 3 | ||
| Noise | 120 | µVrms | 3 | ||||
| Logic Input High Voltage | VIH | 3 | V | IIH = +5µA | 3 | ||
| Logic Input Low Voltage | VIL | -0.3 | 1 | V | IIL = +5µA | 3 | |
| Logic Output High Voltage | VOH | 3.5 | V | IOH = -0.5mA | 3 | ||
| Logic Output Low Voltage | VOL | 0.4 | V | IOL = -0.5mA | 3 | ||
| External Clock | fCLK | 0.2 | 8 | MHz | Optional | 3 | |
| Power Supply Voltage | +V | 4.75 | 5 | 5.25 | V | 3 | |
| Quiescent Current, +VA | 5 | 8.5 | mA | TA = -40°C to +125°C | 3 | ||
| Power Dissipation | 25 | 40 | mW | TA = -40°C to +85°C | 3 | ||
| Power Dissipation | 25 | 42.5 | mW | TA = -40°C to +125°C | 3 | ||
| Conversion Time per A/D | 1.625 | µs | 3 | ||||
| Acquisition Time | 0.375 | µs | 3 | ||||
| Throughput Rate | 500 | kSPS | 3 | ||||
| +VD to AGND | -0.3 | 6 | V | 2 | |||
| Ground Voltage Differences AGND, DGND | -0.3 | 0.3 | V | ±0.3V | 2 | ||
| Power Dissipation | 325 | mW | 2 | ||||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Operating Temperature Range | -40 | 125 | °C | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
ADS7861IBRHBT - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ads7861ibrhbt-etched.step/ads7861ibrhbt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads7861ibrhbt.step/ads7861ibrhbt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
7dbe006fb63a78dd, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).