component
DS1307ZN
Public Made by Adomby adom
HGSEMI Real-time Clocks (RTC), DIP-8L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDS1307ZN
HGSEMI · Real-time Clocks (RTC) · DIP-8L
DS1307ZN from HGSEMI, in a DIP-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1 | passive | 32.768 kHz crystal connection with a specified crystal load capacitance of 12.5 pF; X1 also accepts an external 32.768 kHz oscillator output. |
| 2 | X2 | passive | 32.768 kHz crystal connection that is left floating when the device is driven by an external 32.768 kHz oscillator. |
| 3 | VBAT | power_in | Standard 3 V lithium battery input that must be held between 2.0 V and 3.5 V for proper operation. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Serial data input/output of the I2C interface; this open-drain pin requires an external pull-up resistor. |
| 6 | SCL | input | Serial clock input of the I2C interface; this open-drain pin supports standard mode only at 100 kHz. |
| 7 | SQW/OUT | output | Square-wave output (1 Hz, 4.096 kHz, 8.192 kHz or 32.768 kHz) when SQWE is set, otherwise a controlled logic level; this open-drain pin requires an external pull-up resistor. |
| 8 | VCC | power_in | Main supply input at +5 V nominal, specified over 4.5 V to 5.5 V; device access is disabled when VCC falls below 1.25×VBAT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-8L |
| Category | Clock and Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 3 | |
| Logic 1 input voltage | VIH | 2.2 | V | 3 | |||
| Logic 0 input voltage | VIL | -0.5 | 0.8 | V | 3 | ||
| Battery voltage | VBAT | 2 | 3.5 | V | 3 | ||
| Voltage on any pin to ground | -0.5 | 7 | V | 3 | |||
| Storage temperature | -55 | 125 | ℃ | 3 | |||
| Operating temperature (DS1307Z grade) | -40 | 85 | ℃ | 3 | |||
| Soldering temperature | 260 | ℃ | 10 s | 3 | |||
| Input leakage current (SCL) | ILI | 1 | µA | 3 | |||
| I/O leakage current (SDA and SQW/OUT) | ILO | 1 | µA | 3 | |||
| Logic 0 output voltage | VOL | 0.4 | V | IOL=5mA | 3 | ||
| Power supply operating current | ICCA | 1.5 | mA | SCL at maximum frequency 100kHz (note 7) | 3 | ||
| Standby current | ICCS | 200 | µA | VCC, SDA and SCL at 5.0V (note 1) | 3 | ||
| Battery current (OSC ON), SQW/OUT OFF | IBAT1 | 300 | 500 | nA | OSC ON; SQW/OUT OFF (note 2: VCC=0V, VBAT=3V) | 3 | |
| Battery current (OSC ON), SQW/OUT ON (32kHz) | IBAT2 | 480 | 800 | nA | OSC ON; SQW/OUT ON (32kHz) | 3 | |
| Power-fail voltage (multiplier of VBAT) | VPF | 1.216 | 1.25 | 1.284 | V | multiplier of VBAT; VBAT=3.0V (note 8) | 3 |
| SCL clock frequency | fSCL | 0 | 100 | kHz | 4 | ||
| Bus idle time between STOP and START | tBUF | 4.7 | µs | 4 | |||
| START condition hold time | tHDSTA | 4 | µs | note 3: first clock pulse generated after this period | 4 | ||
| SCL low period | tLOW | 4.7 | µs | 4 | |||
| SCL high period | tHIGH | 4 | µs | 4 | |||
| START condition setup time | tSUSTA | 4.7 | µs | 4 | |||
| Data hold time | tHDDAT | 0 | µs | notes 4,5 | 4 | ||
| Data setup time | tSUDAT | 250 | ns | 4 | |||
| SDA and SCL rise time | tR | 1000 | ns | 4 | |||
| SDA and SCL fall time | tF | 300 | ns | 4 | |||
| STOP condition setup time | tSUSTO | 4.7 | µs | 4 | |||
| Capacitive load per bus | CB | 400 | pF | sum of bus capacitances (note 6) | 4 | ||
| I/O capacitance | CI/O | 10 | pF | TA=25℃ | 4 | ||
| Specified crystal load capacitance | 12.5 | pF | TA=25℃ | 4 |
CAD (KiCad official)
- Symbol:
DS1307ZN - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8L (KiCad packages3D, STEP)
- 3D model files:
ds1307zn-etched.step/ds1307zn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds1307zn.step/ds1307zn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (14 pp, sha256
99d95856b4d3f840, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).