Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

LP87332DRHDR

Texas Instruments · DC-DC Converters · VQFN-28-EP(5x5)

LP87332DRHDR from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT_LDO0 power_out LDO0 output. If the LDO0 is not used, leave the pin floating.
2 FB_B0 passive Output voltage feedback (positive) for Buck 0.
3 FB_B1 passive Output voltage feedback (positive) for Buck 1.
4 AGND power_in Ground.
5 VANA power_in Supply voltage for analog and digital blocks. Must be connected to same node with VIN_Bx.
6 EN input Programmable enable signal for regulators and GPOs. If the pin is not used, leave the pin floating.
7 VOUT_LDO1 power_out LDO1 output. If LDO1 is not used, leave the pin floating.
8 VIN_LDO1 power_in Power input for LDO1. If LDO1 is not used, connect the pin to VANA.
9 nINT output Open-drain interrupt output. Active LOW. If the pin is not used, connect the pin to ground.
10 CLKIN bidirectional External clock input. Alternative function is general-purpose digital output (GPO2). If the pin is not used, leave the pin floating.
11 VIN_B1 power_in Input for Buck 1. The separate power pins VIN_Bx are not connected together internally - VIN_Bx pins must be connected together in the application and be locally bypassed.
12 VIN_B1 power_in Input for Buck 1. The separate power pins VIN_Bx are not connected together internally - VIN_Bx pins must be connected together in the application and be locally bypassed.
13 SW_B1 power_out Buck 1 switch node. If the Buck 1 is not used, leave the pin floating.
14 SW_B1 power_out Buck 1 switch node. If the Buck 1 is not used, leave the pin floating.
15 PGND_B1 power_in Power ground for Buck 1.
16 PGND_B1 power_in Power ground for Buck 1.
17 SCL input Serial interface clock input for I2C access. Connect a pullup resistor. If the I2C interface is not used, connect the pin to Ground.
18 SDA bidirectional Serial interface data input and output for I2C access. Connect a pullup resistor. If the I2C interface is not used, connect the pin to Ground.
19 SGND power_in Ground.
20 PGND_B0 power_in Power ground for Buck 0.
21 PGND_B0 power_in Power ground for Buck 0.
22 SW_B0 power_out Buck 0 switch node. If the Buck 0 is not used, leave the pin floating.
23 SW_B0 power_out Buck 0 switch node. If the Buck 0 is not used, leave the pin floating.
24 VIN_B0 power_in Input for Buck 0. The separate power pins VIN_Bx are not connected together internally - VIN_Bx pins must be connected together in the application and be locally bypassed.
25 VIN_B0 power_in Input for Buck 0. The separate power pins VIN_Bx are not connected together internally - VIN_Bx pins must be connected together in the application and be locally bypassed.
26 GPO output General-purpose digital output. If the pin is not used, leave the pin floating.
27 PGOOD output Power-good indication signal. If the pin is not used, leave the pin floating.
28 VIN_LDO0 power_in Power input for LDO0. If the LDO0 is not used, connect the pin to VANA.
29 THERMAL PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-28-EP(5x5)
Category Power Management (PMIC)
Pins 29

CAD (KiCad official)

  • Symbol: LP87332DRHDR
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: lp87332drhdr-etched.step / lp87332drhdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp87332drhdr.step / lp87332drhdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (79 pp, sha256 bc13eccf64169b1b, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF