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Contents

README

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ISO6721BQDRQ1

TEXAS INSTRUMENTS · Global Sourcing Parts · SOIC-8

ISO6721BQDRQ1 from TEXAS INSTRUMENTS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Side-1 (input-side) supply pin; recommended VCC1 is 1.71 V to 1.89 V at 1.8 V operation or 2.25 V to 5.5 V at 2.5 V to 5 V operation, with absolute maximum VCC1-to-GND1 of -0.5 V to 6 V, and a 0.1 μF bypass capacitor should be placed as close to the pin as possible.
2 OUTA output Channel A output on the side-2 supply domain (ISO6721-Q1 D package); it is referenced to GND2 with absolute limits of -0.5 V to VCC2 + 0.5 V (not to exceed 6 V) and output current limited to ±15 mA.
3 INB input Channel B input on the side-1 supply domain (ISO6721-Q1 D package); it is referenced to GND1 with absolute limits of -0.5 V to VCC1 + 0.5 V (not to exceed 6 V), a logic-high threshold of 0.7 × VCCI and a logic-low threshold of 0.3 × VCCI, and supports data rates up to 50 Mbps.
4 GND1 power_in Ground reference for side 1 (VCC1 and the channel-B input circuitry); all side-1 voltages are measured relative to this pin.
5 GND2 power_in Ground reference for side 2 (VCC2 and the channel-A output circuitry); all side-2 voltages are measured relative to this pin, and it is isolated from GND1 by the isolation barrier.
6 OUTB output Channel B output on the side-2 supply domain (ISO6721-Q1 D package); it is referenced to GND2 with absolute limits of -0.5 V to VCC2 + 0.5 V (not to exceed 6 V) and output current limited to ±15 mA.
7 INA input Channel A input on the side-1 supply domain (ISO6721-Q1 D package); it is referenced to GND1 with absolute limits of -0.5 V to VCC1 + 0.5 V (not to exceed 6 V), a logic-high threshold of 0.7 × VCCI and a logic-low threshold of 0.3 × VCCI, and supports data rates up to 50 Mbps.
8 VCC2 power_in Side-2 (output-side) supply pin; recommended VCC2 is 1.71 V to 1.89 V at 1.8 V operation or 2.25 V to 5.5 V at 2.5 V to 5 V operation, with absolute maximum VCC2-to-GND2 of -0.5 V to 6 V, and a 0.1 μF bypass capacitor should be placed as close to the pin as possible.

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package SOIC-8
Category Global Sourcing Parts
Pins 8

CAD (KiCad official)

  • Symbol: ISO6721BQDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: iso6721bqdrq1-etched.step / iso6721bqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso6721bqdrq1.step / iso6721bqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (61 pp, sha256 99aca7d0878f8ba3, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF